Z86E30/E31/E40
Z8 4K OTP Microcontroller
Zilog
When more than one interrupt is pending, priorities are re-
solved by a programmable priority encoder that is con-
trolled by the Interrupt Priority Register (IPR). An interrupt
machine cycle is activated when an interrupt request is
granted. Thus, disabling all subsequent interrupts, saves
the Program Counter and Status Flags, and then branches
to the program memory vector location reserved for that in-
terrupt. All interrupts are vectored through locations in the
program memory. This memory location and the next byte
contain the 16-bit starting address of the interrupt service
routine for that particular interrupt request.
Programming bits for the Interrupt Edge Select are located
in bits D7 and D6 of the IRQ Register (R250). The config-
uration is shown in Table 11.
1
Table 11. IRQ Register Configuration
IRQ
Interrupt Edge
P31 P32
D7
D6
0
0
1
1
0
1
0
1
F
F
F
R
R
F
To accommodate polled interrupt systems, interrupt inputs
are masked and the interrupt request register is polled to
determine which of the interrupt requests need service.
R/F
R/F
Notes:
F = Falling Edge
R = Rising Edge
An interrupt resulting from AN1 is mapped into IRQ2, and
an interrupt from AN2 is mapped into IRQ0. Interrupts
IRQ2 and IRQ0 may be rising, falling or both edge trig-
gered, and are programmable by the user. The software
may poll to identify the state of the pin.
Clock. The on-chip oscillator has a high-gain, parallel-res-
onant amplifier for connection to a crystal, RC, ceramic
resonator, or any suitable external clock source (XTAL1 =
Input, XTAL2 = Output). The crystal should be AT cut, 10
KHz to 16 MHz max, with a series resistance (RS) less
than or equal to 100 Ohms.
The crystal should be connected across XTAL1 and
XTAL2 using the vendor's recommended capacitor values
from each pin directly to device pin Ground. The RC oscil-
lator option can be selected in the programming mode.
The RC oscillator configuration must be an external resis-
tor connected from XTAL1 to XTAL2, with a frequency-set-
ting capacitor from XTAL1 to Ground (Figure 29).
XTAL1
XTAL2
XTAL1
XTAL1
XTAL2
XTAL1
XTAL2
C1
C2
C1
C2
C1
L
R
XTAL2
Ceramic Resonator or
Crystal
LC
RC
External Clock
C1, C2 = 22 pF
@ 5V Vcc (TYP)
C1, C2 = 47 pF TYP *
F = 8 MHz
L = 130 µH *
F = 3 MHz *
C1 = 100 pF
R = 2K
F = 6 MHz
* Typical value including pin parasitics
Figure 29. Oscillator Configuration
P R E L I M I N A R Y
DS97Z8X0500
41
ZILOG [ ZILOG, INC. ]
