Z86E30/E31/E40
Z8 4K OTP Microcontroller
Zilog
Power-On Reset (POR). A timer circuit clocked by a ded-
icated on-board RC oscillator is used for the Power-On Re-
In order to enter STOP or HALT mode, it is necessary to
first flush the instruction pipeline to avoid suspending exe-
cution in mid-instruction. To do this, the user must execute
a NOP (opcode=FFH) immediately before the appropriate
sleep instruction, that is:
set (POR) timer function. The POR timer allows V and
CC
the oscillator circuit to stabilize before instruction execu-
tion begins.
The POR timer circuit is a one-shot timer triggered by one
of three conditions:
FF
6F
NOP
; clear the pipeline
STOP
; enter STOP
;mode
1. Power fail to Power OK status
2. STOP-Mode Recovery (if D5 of SMR=0)
3. WDT time-out
or
FF
7F
NOP
HALT
; clear the pipeline
; enter HALT mode
STOP. This instruction turns off the internal clock and ex-
ternal crystal oscillation and reduces the standby current
to 10 microamperes or less. STOP mode is terminated by
one of the following resets: either by WDT time-out, POR,
a STOP-Mode Recovery Source, which is defined by the
SMR register or external reset. This causes the processor
to restart the application program at address 000CH.
The POR time is a nominal 5 ms. Bit 5 of the STOP mode
Register (SMR) determines whether the POR timer is by-
passed after STOP-Mode Recovery (typical for an external
clock and RC/LC oscillators with fast start up times).
HALT. Turns off the internal CPU clock, but not the XTAL
oscillation. The counter/timers and external interrupt IRQ0,
IRQ1, and IRQ2 remain active. The device is recovered by
interrupts, either externally or internally generated. An in-
terrupt request must be executed (enabled) to exit HALT
mode. After the interrupt service routine, the program con-
tinues from the instruction after the HALT.
Port Configuration Register (PCON). The PCON regis-
ter configures the ports individually; comparator output on
Port 3, open-drain on Port 0 and Port 1, low EMI on Ports
0, 1, 2 and 3, and low EMI oscillator. The PCON register is
located in the expanded register file at Bank F, location 00
(Figure 30).
42
P R E L I M I N A R Y
DS97Z8X0500
ZILOG [ ZILOG, INC. ]
