Z8018008VSC 参数 Datasheet PDF下载

Z8018x Family

MPU User Manual

Channel 0

•

SAR0–Source Address Register

DAR0–Destination Address Register

BCR0–Byte Count Register

Channel 1

•

MAR1–Memory Address Register

IAR1–I/O Address Register

BCR1–Byte Count Register

The two channels share the following three additional registers in common:

•

DSTAT–DMA Status Register

DMODE–DMA Mode Register

DCNTL–DMA Control Register

DMAC Block Diagram

Figure 45 depicts the Z8X180 DMAC Block Diagram.

UM005001-ZMP0400

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