eZ80L92 MCU
Product Specification
52
An example of WAIT state operation is illustrated in Figure 6. In this example, the Chip
Select is configured to provide a single WAIT state. The external peripheral being
accessed drives the WAIT pin Low to request assertion of an additional WAIT state. If the
WAIT pin is asserted for additional system clock cycles, WAIT states are added until the
WAIT pin is de-asserted (High).
TCLK
TCSx_WAIT
TWAIT
XIN
ADDR[23:0]
DATA[7:0]
(input)
CSx
MREQ
RD
INSTRD
WAIT
Figure 6. Wait State Operation Example (Read Operation)
PS013015-0316
Chip Selects and Wait States