eZ80L92 MCU
Product Specification
49
Memory Chip Select Priority
A lower-numbered Chip Select is given priority over a higher-numbered Chip Select. For
example, if the address space of Chip Select 0 overlaps the Chip Select 1 address space,
Chip Select 0 is active.
RESET States
On RESET, Chip Select 0 is active for all addresses, as its Lower Bound register resets to
00h and its Upper Bound register resets to FFh. All of the other Chip Select Lower and
Upper Bound registers reset to 00h.
Memory Chip Select Example
The use of Memory Chip Selects is illustrated in Figure 4. The associated control register
values are listed in Table 13. In this example, all 4 Chip Selects are enabled and
configured for memory addresses. Also, CS1 overlaps with CS0. As CS0 has the higher
than CS1, CS1 is not active for much of its defined address space.
Memory
Location
CS3_UBR = FFh
FFFFFFh
CS3 Active
3 MB Address Space
CS3_LBR = D0h
CS2_UBR = CFh
D00000h
CFFFFFh
CS2 Active
3 MB Address Space
CS2_LBR = A0h
CS1_UBR = 9Fh
A00000h
9FFFFFh
CS1 Active
2 MB Address Space
800000h
7FFFFFh
CS0_UBR = 7Fh
CS0 Active
8 MB Address Space
CS0_LBR = CS1_LBR = 00h
000000h
Figure 4. Memory Chip Select Example
PS013015-0316
Chip Selects and Wait States