eZ80L92 MCU
Product Specification
44
Interrupt Controller
The interrupt controller on the ZLP12840 MCU routes the interrupt request signals from
the internal peripherals and external devices (through the GPIO pins) to the eZ80 CPU.
Maskable Interrupts
On the ZLP12840 MCU, all maskable interrupts use the eZ80 CPU’s vectored interrupt
function. Table 11 lists the low-byte vector for each of the maskable interrupt sources.
The maskable interrupt sources are listed in order of their priority, with vector 00h being
the highest-priority interrupt. The 16-bit interrupt vector is located at starting address
{I[7:0], IVECT[7:0]}, where I[7:0] is the eZ80 CPU’s Interrupt Page Address Register.
Table 11. Interrupt Vector Sources by Priority
Vector
00h
02h
04h
06h
08h
0Ah
0Ch
0Eh
10h
12h
14h
16h
18h
Source
Unused
Unused
Unused
Unused
Unused
PRT 0
PRT 1
PRT 2
PRT 3
PRT 4
PRT 5
RTC
Vector
1Ah
1Ch
1Eh
20h
22h
24h
26h
28h
2Ah
2Ch
2Eh
30h
32h
Source
Vector
34h
36h
38h
3Ah
3Ch
3Eh
40h
42h
44h
46h
48h
4Ah
4Ch
Source
Port B 2
Port B 3
Port B 4
Port B 5
Port B 6
Port B 7
Port C 0
Port C 1
Port C 2
Port C 3
Port C 4
Port C 5
Port C 6
Vector
4Eh
50h
52h
54h
56h
58h
5Ah
5Ch
5Eh
60h
62h
64h
66h
Source
Port C 7
Port D 0
Port D 1
Port D 2
Port D 3
Port D 4
Port D 5
Port D 6
Port D 7
Unused
Unused
Unused
Unused
UART 1
2
I C
SPI
Unused
Unused
Unused
Unused
Unused
Unused
Unused
Unused
Port B 0
Port B 1
UART 0
Note: Absolute locations 00h, 08h, 10h, 18h, 20h, 28h, 30h, 38h, and 66h are reserved for hardware
reset, NMI, and RST instruction.
Your program must store the interrupt service routine starting address in the two-byte
interrupt vector locations. For example, for ADL mode the two-byte address for the SPI
interrupt service routine would be stored at {00h, I[7:0], 1Eh} and {00h, I[7:0], 1Fh}. In
Z80 mode, the two-byte address for the SPI interrupt service routine would be stored at
PS013015-0316
Interrupt Controller
ZILOG [ ZILOG, INC. ]
