eZ80L92 MCU
Product Specification
10
Table 1. 100-Pin LQFP Pin Identification of eZ80L92 MCU (Continued)
Pin No Symbol
Function
Signal Direction
Description
35
36
37
38
39
40
41
42
DATA0
DATA1
DATA2
DATA3
DATA4
DATA5
DATA6
DATA7
Data Bus
Bidirectional
The data bus transfers data to and from
I/O and memory devices. The eZ80L92
MCU drives these lines only during Write
cycles when the eZ80L92 MCU is the bus
master.
Data Bus
Data Bus
Data Bus
Data Bus
Data Bus
Data Bus
Data Bus
Bidirectional
Bidirectional
Bidirectional
Bidirectional
Bidirectional
Bidirectional
Bidirectional
The data bus transfers data to and from
I/O and memory devices. The eZ80L92
MCU drives these lines only during Write
cycles when the eZ80L92 MCU is the bus
master.
The data bus transfers data to and from
I/O and memory devices. The eZ80L92
MCU drives these lines only during Write
cycles when the eZ80L92 MCU is the bus
master.
The data bus transfers data to and from
I/O and memory devices. The eZ80L92
MCU drives these lines only during Write
cycles when the eZ80L92 MCU is the bus
master.
The data bus transfers data to and from
I/O and memory devices. The eZ80L92
MCU drives these lines only during Write
cycles when the eZ80L92 MCU is the bus
master.
The data bus transfers data to and from
I/O and memory devices. The eZ80L92
MCU drives these lines only during Write
cycles when the eZ80L92 MCU is the bus
master.
The data bus transfers data to and from
I/O and memory devices. The eZ80L92
MCU drives these lines only during Write
cycles when the eZ80L92 MCU is the bus
master.
The data bus transfers data to and from
I/O and memory devices. The eZ80L92
MCU drives these lines only during Write
cycles when the eZ80L92 MCU is the bus
master.
PS013014-0107
Architectural Overview
ZILOG [ ZILOG, INC. ]
