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EZ80L92AZ020SC00TR 参数 Datasheet PDF下载

EZ80L92AZ020SC00TR图片预览
型号: EZ80L92AZ020SC00TR
PDF下载: 下载PDF文件 查看货源
内容描述: [IC MCU 8BIT ROMLESS 100LQFP]
分类和应用:
文件页数/大小: 238 页 / 1067 K
品牌: ZILOG [ ZILOG, INC. ]
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eZ80L92 MCU  
Product Specification  
13  
Table 1. 100-Pin LQFP Pin Identification of eZ80L92 MCU (Continued)  
Pin No Symbol  
Function  
Signal Direction  
Description  
63  
64  
65  
66  
TCK  
JTAG Test  
Clock  
Input  
JTAG and ZDI clock input.  
TRIGOUT  
TDI  
JTAG Test  
Trigger Output  
Output  
Active High trigger event indicator.  
JTAG Test  
Data In  
Bidirectional  
Output  
JTAG data input pin. Functions as  
ZDI data I/O pin when JTAG is disabled.  
TDO  
JTAG Test  
Data Out  
JTAG data output pin.  
67  
68  
V
Power Supply  
GPIO Port D  
Power Supply.  
DD  
PD0  
Bidirectional  
This pin can be used for GPIO. It can be  
individually programmed as input or  
output and can also be used individually  
as an interrupt input. Each Port D pin,  
when programmed as output, can be  
selected to be an open-drain or open-  
source output. Port D is multiplexed with  
one UART.  
TxD0  
IR_TXD  
PD1  
UART  
Transmit Data  
Output  
This pin is used by the UART to transmit  
asynchronous serial data. This signal is  
multiplexed with PD0.  
IrDA Transmit Output  
Data  
This pin is used by the IrDA encoder/  
decoder to transmit serial data. This signal  
is multiplexed with PD0.  
69  
GPIO Port D  
Bidirectional  
This pin can be used for GPIO. It can be  
individually programmed as input or  
output and can also be used individually  
as an interrupt input. Each Port D pin,  
when programmed as output, can be  
selected to be an open-drain or open-  
source output. Port D is multiplexed with  
one UART.  
RxD0  
Receive Data Input  
This pin is used by the UART to receive  
asynchronous serial data. This signal is  
multiplexed with PD1.  
IR_RXD  
IrDA Receive Input  
Data  
This pin is used by the IrDA encoder/  
decoder to receive serial data. This signal  
is multiplexed with PD1.  
PS013014-0107  
Architectural Overview  
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