eZ80L92 MCU
Product Specification
181
Bit
Position
Value Description
[7:0]
00h–FFh Values read from the memory location as requested by
the ZDI Read Control register during a ZDI Read
operation. The 24-bit value is supplied by {ZDI_RD_U,
ZDI_RD_H, ZDI_RD_L}.
ZDI_RD_L,
ZDI_RD_H,
or
ZDI_RD_U
ZDI Bus Status Register
The ZDI Bus Status register monitors BUSACKs during DEBUG mode. See Table 105.
Table 105. ZDI Bus Control Register (ZDI_BUS_STAT = 17h in the ZDI
Register Read-Only Address Space)
Bit
7
0
6
0
5
0
4
0
3
0
2
0
1
0
0
0
Reset
CPU Access
Note: R = Read-only.
R
R
R
R
R
R
R
R
Bit
Position
Value Description
7
0
Bus requests by external peripherals using the
ZDI_BUSAcK_En
BUSREQ pin are ignored. The bus acknowledge signal,
BUSACK, is not asserted.
1
Bus requests by external peripherals using the
BUSREQ pin are accepted. A bus acknowledge occurs
at the end of the current ZDI operation. The bus
acknowledge is indicated by asserting the BUSACK pin.
6
0
1
Address and data buses are not relinquished to an
external peripheral. bus acknowledge is deasserted
(BUSACK pin is High).
ZDI_BUS_STAT
Address and data buses are relinquished to an external
peripheral. bus acknowledge is asserted (BUSACK pin
is Low).
[5:0]
000000 Reserved.
PS013015-0316
Zilog Debug Interface
ZILOG [ ZILOG, INC. ]
