eZ80L92 MCU
Product Specification
145
Table 75. I2C Master Transmit Status Codes
2
2
Code
I C State
MCU Response
Next I C Action
1
18h
Addr+W transmitted , For a 7-bit address: write
Transmit data byte,
receive ACK
ACK received
byte to DATA, clear IFLG
Or set STA, clear IFLG
Transmit repeated
START
Or set STP, clear IFLG
Transmit STOP
Or set STA & STP, clear
IFLG
Transmit STOP then
START
For a 10-bit address: write
extended address byte to
DATA, clear IFLG
Transmit extended
address byte
20h
38h
Addr+W transmitted,
ACK not received
Same as code 18h
Same as code 18h
Arbitration lost
Clear IFLG
Return to idle
Or set STA, clear IFLG
Transmit START when
bus is free
2
68h
Arbitration lost,
+W received,
Clear IFLG, AAK = 0
Receive data byte,
transmit NACK
ACK transmitted
Or clear IFLG, AAK = 1
Same as code 68h
Receive data byte,
transmit ACK
78h
B0h
Arbitration lost,
General call addr
received, ACK
transmitted
Same as code 68h
Arbitration lost,
SLA+R received,
ACK transmitted
Write byte to DATA, clear
IFLG, clear AAK = 0
Transmit last byte,
receive ACK
Or write byte to DATA, clear Transmit data byte,
IFLG, set AAK = 1 receive ACK
Notes:
1. W is defined as the Write bit; i.e., the lsb is cleared to 0.
2
2. AAK is defined as the I C Acknowledge bit.
If 10-bit addressing is being used, then the status code is 18h or 20h after the first part of
a 10-bit address plus the Write bit are successfully transmitted.
After this interrupt is serviced and the second part of the 10-bit address is transmitted, the
I2C_SR register contains one of the codes in Table 76.
PS013015-0316
I2C Serial I/O Interface
ZILOG [ ZILOG, INC. ]
