eZ80L92 MCU
Product Specification
141
Transferring Data
Byte Format
Every character transferred on the SDA line must be a single 8-bit byte. The number of
bytes that can be transmitted per transfer is unrestricted. Each byte must be followed by an
Acknowledge (ACK)1. Data is transferred with the most significant bit (msb) first. See
Figure 32. A receiver can hold the SCL line Low to force the transmitter into a wait state.
Data transfer then continues when the receiver is ready for another byte of data and
releases SCL.
SDA Signal
SCL Signal
MSB
1
Acknowledge from
Receiver
Acknowledge from
Receiver
2
8
9
1
9
S
P
ACK
START Condition
STOP Condition
Clock Line Held Low By Receiver
2
Figure 32. I C Frame Structure
Acknowledge
Data transfer with an ACK function is obligatory. The ACK-related clock pulse is gener-
ated by the master. The transmitter releases the SDA line (High) during the ACK clock
pulse. The receiver must pull down the SDA line during the ACK clock pulse so that it
remains stable Low during the High period of this clock pulse. See Figure 33.
A receiver that is addressed is obliged to generate an ACK after each byte is received.
When a slave-receiver doesn't acknowledge the slave address (for example, unable to
receive because it's performing some real-time function), the data line must be left High
by the slave. The master then generates a STOP condition to abort the transfer.
If a slave-receiver acknowledges the slave address, but cannot receive any more data
bytes, the master must abort the transfer. The abort is indicated by the slave generating the
Not Acknowledge (NACK) on the first byte to follow. The slave leaves the data line High
and the master generates the STOP condition.
If a master-receiver is involved in a transfer, it must signal the end of data to the slave-
transmitter by not generating an ACK on the final byte that is clocked out of the slave. The
2
1. ACK is defined as a general Acknowledge bit. By contrast, the I C Acknowledge bit is repre-
2
sented as AAK, bit 2 of the I C Control Register, which identifies which ACK signal to transmit.
See Table 84 on page 154.
PS013015-0316
I2C Serial I/O Interface
ZILOG [ ZILOG, INC. ]
