eZ80L92 MCU
Product Specification
137
SPI Transmit Shift Register
The SPI Transmit Shift register (SPI_TSR) is used by the SPI master to transmit data onto
the SPI serial bus to the slave device. A Write to the SPI_TSR register places data directly
into the shift register for transmission. A Write to this register within an SPI device
configured as a master initiates transmission of the byte of the data loaded into the register.
At the completion of transmitting a byte of data, the SPIF status bit (SPI_SR[7]) is set to 1
in both the master and slave devices.
The SPI Transmit Shift Write-Only register shares the same address space as the SPI
Receive Buffer Read-Only register. See Table 73.
Table 73. SPI Transmit Shift Register (SPI_TSR = 00BCh)
Bit
7
X
6
X
5
X
4
X
3
X
2
X
1
X
0
X
Reset
CPU Access
Note: W= Write Only.
W
W
W
W
W
W
W
W
Bit
Position
Value Description
00h–FFh SPI transmit data.
[7:0]
TX_DATA
SPI Receive Buffer Register
The SPI Receive Buffer register (SPI_RBR) is used by the SPI slave to receive data from
the serial bus. The SPIF bit must be cleared prior to a second transfer of data from the shift
register or an overrun condition exists. In cases of overrun, the byte that caused the over-
run is lost.
The SPI Receive Buffer Read-Only register shares the same address space as the SPI
Transmit Shift Write-Only register. See Table 74.
Table 74. SPI Receive Buffer Register (SPI_RBR = 00BCh)
Bit
7
X
R
6
X
R
5
X
R
4
X
R
3
X
R
2
X
R
1
X
R
0
X
R
Reset
CPU Access
Note: R = Read Only
PS013015-0316
Serial Peripheral Interface
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