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ZL50022QCG1 参数 Datasheet PDF下载

ZL50022QCG1图片预览
型号: ZL50022QCG1
PDF下载: 下载PDF文件 查看货源
内容描述: 增强型4K的数字开关与地层4E DPLL [Enhanced 4 K Digital Switch with Stratum 4E DPLL]
分类和应用: 开关电信集成电路电信转换电路电信电路
文件页数/大小: 121 页 / 931 K
品牌: ZARLINK [ ZARLINK SEMICONDUCTOR INC ]
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ZL50022  
Data Sheet  
AC Electrical Characteristics- FPi and CKi Timing when CKIN1-0 bits = 00 (16.384 MHz)  
Characteristic  
FPi Input Frame Pulse Width  
FPi Input Frame Pulse Setup Time  
FPi Input Frame Pulse Hold Time  
CKi Input Clock Period  
CKi Input Clock High Time  
CKi Input Clock Low Time  
CKi Input Clock Rise/Fall Time  
CKi Input Clock Cycle to Cycle Variation  
Sym.  
Min. Typ.Max. Units Notes  
1
2
3
4
5
6
7
8
tFPIW  
tFPIS  
tFPIH  
tCKIP  
tCKIH  
tCKIL  
rCKi, tfCKi  
tCVC  
40  
20  
20  
55  
27  
27  
61  
115  
ns  
ns  
ns  
ns  
ns  
ns  
ns  
ns  
61  
67  
34  
34  
3
t
0
20  
† Characteristics are over recommended operating conditions unless otherwise stated.  
‡ Typical figures are at 25°C and are for design aid only: not guaranteed and not subject to production testing.  
AC Electrical Characteristics- FPi and CKi Timing when CKIN1-0 bits = 01 (8.192 MHz)  
Characteristic  
FPi Input Frame Pulse Width  
FPi Input Frame Pulse Setup Time  
FPi Input Frame Pulse Hold Time  
CKi Input Clock Period  
CKi Input Clock High Time  
CKi Input Clock Low Time  
CKi Input Clock Rise/Fall Time  
CKi Input Clock Cycle to Cycle Variation  
Sym.  
Min. Typ.Max. Units Notes  
1
2
3
4
5
6
7
8
tFPIW  
tFPIS  
tFPIH  
tCKIP  
tCKIH  
tCKIL  
trCKi, tfCKi  
tCVC  
90  
45  
122  
220  
ns  
ns  
ns  
ns  
ns  
ns  
ns  
ns  
45  
110  
55  
55  
122  
135  
69  
69  
3
0
20  
† Characteristics are over recommended operating conditions unless otherwise stated.  
‡ Typical figures are at 25°C and are for design aid only: not guaranteed and not subject to production testing.  
AC Electrical Characteristics- FPi and CKi Timing when CKIN1-0 bits = 10 (4.096 MHz)  
Characteristic  
Sym.  
Min. Typ.Max. Units Notes  
1
2
3
4
5
6
7
8
FPi Input Frame Pulse Width  
tFPIW  
tFPIS  
tFPIH  
tCKIP  
tCKIH  
tCKIL  
rCKi, tfCKi  
tCVC  
90  
244  
420  
ns  
ns  
ns  
ns  
ns  
ns  
ns  
ns  
FPi Input Frame Pulse Setup Time  
FPi Input Frame Pulse Hold Time  
CKi Input Clock Period  
CKi Input Clock High Time  
CKi Input Clock Low Time  
110  
110  
220  
110  
110  
244  
270  
135  
135  
3
CKi Input Clock Rise/Fall Time  
CKi Input Clock Cycle to Cycle Variation  
t
0
20  
† Characteristics are over recommended operating conditions unless otherwise stated.  
‡ Typical figures are at 25°C and are for design aid only: not guaranteed and not subject to production testing.  
99  
Zarlink Semiconductor Inc.  
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