ZL50022
Data Sheet
AC Electrical Characteristics† - JTAG Test Port Timing
Characteristic
TCK Clock Period
Sym.
Min.
Typ. Max.
Units
Notes
1
2
3
4
5
6
7
8
9
tTCKP
tTCKH
tTCKL
tTMSS
tTMSH
tTDIS
100
20
20
10
10
20
60
ns
ns
ns
ns
ns
ns
ns
ns
ns
TCK Clock Pulse Width High
TCK Clock Pulse Width Low
TMS Set-up Time
TMS Hold Time
TDi Input Set-up Time
TDi Input Hold Time
TDo Output Delay
tTDIH
tTDOD
30
CL = 30 pF
TRST pulse width
tTRSTW
200
† Characteristics are over recommended operating conditions unless otherwise stated.
tTCKL
tTCKH
tTCKP
TCK
TMS
tTMSH
tTMSS
tTDIS
tTDIH
TDi
tTDOD
TDo
tTRSTW
TRST
Figure 30 - JTAG Test Port Timing Diagram
AC Electrical Characteristics† - OSCi 20 MHz Input Timing
Characteristic
Sym.
Min.
Typ.
Max.
Units
Notes‡
Stratum 4E
1
Input frequency accuracy
-32
-100
32
100
ppm
ppm
Relaxed Stratum 4E
2
3
Duty cycle
Input rise or fall time
40
60
3
%
ns
1
14
tIR, IF
t
† Characteristics are over recommended operating conditions unless otherwise stated.
‡ See “Performance Characteristics Notes” on page 118.
98
Zarlink Semiconductor Inc.
ZARLINK [ ZARLINK SEMICONDUCTOR INC ]
