ZL50022
Data Sheet
FPi
CKi
(16.384 MHz)
tSIS16
tSIH16
STi0 - 31
Bit1
Bit0
Bit7
Ch0
Bit6
Bit5
Ch0
Bit4
Ch0
Bit3
Ch0
Bit2
Ch0
Bit1
Ch0
Bit0
Ch0
VTT
VCT
Ch255
Ch255
Ch0
16.384 Mbps
Input Frame Boundary
Figure 34 - ST-BUS Input Timing Diagram when Operated at 16 Mbps
FPi
CKi
(16.384 MHz)
FPi
CKi
(8.192 MHz)
FPi
CKi
(4.096 MHz)
tSIS2
tSIH2
STi0 - 31
Bit7
Bit1
Ch0
Bit0
Ch0
tSIS4
tSIH4
VCT
Ch31
2.048 Mbps
STi0 - 31
Bit7
Bit0
Ch0
Bit1
Ch0
Bit2
Ch0
Bit3
Ch0
VCT
Ch63
4.096 Mbps
tSIS8
tSIH8
STi0 - 31
Bit7
Ch127
Bit6
Ch127
Bit0
Ch0
Bit1
Bit2
Ch0
Bit3
Ch0
Bit4
Ch0
Bit5
Ch0
Bit6
Ch0
Bit7
Ch0
VTT
VCT
Ch0
8.192 Mbps
Input Frame Boundary
Figure 35 - GCI-Bus Input Timing Diagram when Operated at 2, 4, 8 Mbps
102
Zarlink Semiconductor Inc.
ZARLINK [ ZARLINK SEMICONDUCTOR INC ]
