ZL38001
Data Sheet
External Read Address: 25H
Reset Value: 3EH
7
6
5
4
3
2
1
0
L8
L7
L6
L5
L4
L3
L2
L1
Bit
Name
Description
7
6
5
4
3
2
1
0
L8
L7
L6
L5
L4
L3
L2
L1
In conjunction with bit 7 (L0) of the above (RL1) register, this register (RL2)
allows the user to program the output Limiter threshold value in the Rout path.
Default value is (07D)h which is equal to 3.14 dBmo
Maximum value is (1FF)h = 15 dBmo
Minimum value is (001)h = -38 dBmo
Register Table 23 - Rout Limiter Register 2 (RL2)
External Read Address: 26H
Reset Value: 3DH
7
6
5
4
3
2
1
0
L4
L3
L2
L1
L0
Bit
Name
Description
7
6
5
4
3
2
1
0
L4
L3
L2
L1
L0
-
This register allows the user to program the output Limiter threshold value in
the Rout path.
Default value is (1D)h which is equal to 3.14 dBmo
Maximum value is (1F)h
RESERVED. Must be keep as 1.
RESERVED. Must be keep as 0.
-
-
RESERVED. Must be keep as 1.
Register Table 24 - Sout Limiter Register (SL)
42
Zarlink Semiconductor Inc.