ZL38001
Data Sheet
External Read Address: 03H
Reset Value: 00H
7
6
5
4
3
2
1
0
FRC2
FRC1
FRC0
-
-
-
-
-
Bit
Name
Description
7
6
5
4
3
2
1
0
FRC2
Revision code of the firmware program currently being run (default=rom=00).
FRC1
FRC0
-
-
-
-
-
RESERVED
Register Table 25 - Firmware Revision Code Register (FRC)
External Read Address: 3FH
Reset Value: 00H
7
6
5
4
3
2
1
0
-
-
-
-
C3
C2
C1
C0
Bit
Name
Description
7
6
5
4
3
-
-
RESERVED
-
-
C3
RAM_ROMb bit. When high, device executes from RAM. When low, device
executes from ROM.
2
C2
BOOT bit. When high, puts device in bootload mode. When low, bootload is
disabled.
1
0
C1
C0
RESERVED. Must be set to zero.
RESERVED. Must be set to zero.
Register Table 26 - Bootload RAM Control Register (BRC)
43
Zarlink Semiconductor Inc.
ZARLINK [ ZARLINK SEMICONDUCTOR INC ]
