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ZL30402/QCC 参数 Datasheet PDF下载

ZL30402/QCC图片预览
型号: ZL30402/QCC
PDF下载: 下载PDF文件 查看货源
内容描述: SONET / SDH网元PLL [SONET/SDH Network Element PLL]
分类和应用: 电信集成电路异步传输模式ATM
文件页数/大小: 44 页 / 471 K
品牌: ZARLINK [ ZARLINK SEMICONDUCTOR INC ]
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ZL30402  
Data Sheet  
Pin Description (continued)  
Pin #  
Name  
Description  
53  
C34/C44  
Clock 34.368 MHz / clock 44.736 MHz (CMOS Output). This clock is  
programmable to be either 34.368 MHz (for E3 applications) or 44.736 MHz  
(for DS3 applications) when E3DS3/OC3 is high, or to be either 8.592MHz or  
11.184 MHz when E3DS3/OC3 is low. See description of E3DS3/OC3 and  
E3/DS3 inputs for details. In Software Control the functionality of this output is  
controlled by Control Register 2 (Table 7 "Control Register 2 (R/W)").  
54  
55  
VDD  
Positive Power Supply.  
HOLDOVER  
Holdover Indicator (CMOS output). Logic high at this output indicates that the  
device is in Holdover mode.  
56  
57  
NC  
No internal bonding Connection. Leave unconnected.  
LOCK  
Lock Indicator (CMOS output). Logic high at this output indicates that  
ZL30402 is locked to the input reference.  
58  
59  
NC  
DS  
No internal bonding Connection. Leave unconnected.  
Data Strobe (5 V tolerant input). This input is the active low data strobe of the  
processor interface.  
60  
61  
62  
IC  
IC  
Internal Connection. Connect to ground.  
Internal Connection. Leave unconnected.  
OE  
Output Enable (Input). Logic high on this input enables C19, F16, C16, C8,  
C6, C4, C2, C1.5, F8 and F0 signals. Pulling this input low will force the output  
clocks pins into a high impedance state.  
63  
64  
CS  
Chip Select (5 V tolerant input). This active low input enables the  
microprocessor interface. When CS is set to high, the microprocessor interface  
is idle and all Data Bus I/O pins will be in a high impedance state.  
RESET  
HW  
RESET (5 V tolerant input). This active low input forces the ZL30402 into a  
RESET state. The RESET pin must be held low for a minimum of 1µs to reset  
the device properly. The ZL30402 must be reset after power-up.  
65  
Hardware/Software Control (Input). If this pin it tied low, the ZL30402 is  
controlled via the microport. If it is tied high, the ZL30402 is controlled via the  
control pins MS1, MS2, FCS, RefSel, RefAlign, E3/DS3 and E3DS3/OC3.  
66-69  
D0 - D3  
Data 0 to Data 3 (5 V tolerant three-state I/O). These signals combined with  
D4 - D7 form the bi-directional data bus of the microprocessor interface (D0 is  
the least significant bit).  
70  
71  
72  
73  
GND  
IC  
Ground.  
Internal Connection (Input). Connect this pin to ground.  
Internal Connection (Input). Connect this pin to ground.  
Positive Power Supply.  
IC  
VDD  
10  
Zarlink Semiconductor Inc.  
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