MVTX2801
Data Sheet
Ball No(s)
Symbol
I/O
Description
C22, B22, A22, E22, B_A[18:2]
C23, B23, A23, C24,
D24, D23, B24, A24,
E23, C25, C26, B25,
A25
Output
Switch Database Address (512K)
- Address Bit [18:2]
C29
D25
B_CLK
B_ADSC#
Output
Output with pull up
Switch Database Clock Input
Switch Database Address Status
Control
B26
A26
B_WE#
B_OE#
Output with pull up
Output with pull up
Switch Database Write Chip Select
Switch Database Read Chip Select
MII Management Interface
AJ16
M_MDC
Output
MII Management Data Clock -
(common for all MII Ports [3:0])
AG18
M_MDIO
I/O-TS with pull up
MII Management Data I/O -
(common for all MII Ports -[3:0]))
2.5Mhz
GMII / MII Interface (193) Gigabit Ethernet Access Port
AJ11, AJ6, AF3,AA4
GREF_CLK [3:0]
NC
Input w/ pull up
Gigabit Reference Clock
AD29, AK30, AJ22,
AG17
AK15
AF17
CM_CLK
IND/CM
Input w/ pull up
Input w/ pull up
Common Clock shared by port G[3:0]
1: select GREF_CLK[3:0] as clock 0:
select CM_CLK as clock for all ports
AJ13, AH7, AH3, AB1 MII TX CLK[3:0]
Input w/ pull up
AA30, AK29, AG25,
NC
AK18,
AG16, AF16, AG15,
AF18, AF15, AH15,
AJ15, AG14
G3_RXD[7:0]
Input w/ pull up
G[3:0] port - Receive Data Bit [7:0]
G2_RXD[7:0]
G1_RXD[7:0]
AG11, AJ10, AF11,
AF10, AG9, AF9,
AH9, AJ9
AF6, AJ5, AF5, AG6,
AK4, AF4, AK3, AH4 G0_RXD[7:0]
AF1, AC5, AE1, AE2,
AE3, AC4, AE4, AD1
Table 8 - Ball- Signal Descriptions (continued)
77
Zarlink Semiconductor Inc.