MVTX2801
Data Sheet
2
CPU
Addr
(Hex)
I C
Register
Description
R/W
Default
Notes
Addr
(Hex)
LEDUSER2
LED User Define Reg. 2/LED_byte pin 2
LED User Define Reg. 3/LED_byte pin 3
LED User Define Reg. 4/LED_byte pin 4
LED User Define Reg. 5/LED_byte pin 5
LED User Define Reg. 6/LED_byte pin 6
60E
R/W
R/W
R/W
R/W
R/W
R/W
0BD
80
33
32
20
40
61
LEDUSER3
LEDUSER4
LEDUSER5
LEDUSER6
LEDUSER7
60F
610
611
612
613
0BE
0BF
0C0
0C1
0C2
LED User Define Reg. 7/LED_byte pin 1 &
0
MIINP0
MII NEXT PAGE DATA REGISTER0
MII NEXT PAGE DATA REGISTER1
614
615
R/W
R/W
0C3
0C4
00
00
MIINP1
E. Test Group Control
DTSRL
Test Register Low
E00
E01
E02
E03
E04
E05
E06
E07
E08
E09
E0A
R/W
R/W
R/W
RO
N/A
N/A
N/A
N/A
N/A
N/A
0B6
0B7
0B8
0B9
0BA
00
01
00
DTSRM
Test Register Medium
Test Register High
DTSRH
TDRB0
TEST MUX read back register [7:0]
TEST MUX read back register [15:8]
Test Counter Register
MASK Timeout 0
TDRB1
RO
DTCR
R/W
R/W
R/W
R/W
R/W
R/W
00
00
00
00
00
00
MASK0
MASK1
MASK Timeout 1
MASK2
MASK Timeout 2
MASK3
MASK Timeout 3
MASK4
MASK Timeout 4
F. Device Configuration Register
GCR
Global Control Register
F00
F01
F02
F03
F04
F05
F06
F07
F08
F09
F0A
R/W
RO
N/A
N/A
NA
00
DCR
Device Status and Signature Register
Gigabit Port0 Port1 Status Register
Gigabit Port2 Port3 Status Register
Gigabit Port4 Port5 Status Register
Gigabit Port6 Port7 Status Register
Device Port Status Register
Data read back register
DCR01
DCR23
DCR45
DCR67
DPST
RO
RO
NA
RO
NA
RO
NA
R/W
RO
N/A
N/A
N/A
N/A
N/A
00
DTST
PLLCR
LCLKCR
BCLKCR
PLL Control Register
R/W
R/W
R/W
00
00
00
LCLK Control Register
BCLK Control Register
Table 7 - MVTX2801 Register Description (continued)
30
Zarlink Semiconductor Inc.
ZARLINK [ ZARLINK SEMICONDUCTOR INC ]
