MVTX2801
Data Sheet
10.0 Register Definition
10.1 Register Description
2
CPU
Addr
(Hex)
I C
Register
Description
R/W
Default
Notes
Addr
(Hex)
0. ETHERNET Port Control Registers - Substitute [N] with Port number (0..3)
ECR1P”N”
Port Control Register 1 for Port N
Port Control Register 2 for Port N
Extra Gigabit Port Control -port 0,1
Extra Gigabit Port Control -port 2,3
Active Link status port 3:0
000 + 2N
001 + 2N
012
R/W
R/W
R/W
R/W
R/W
000+2N
001+2N
N/A
c0
00
00
00
00
ECR2P”N”
GGCONTROL0
GGCONTROL1
ACTIVELINK
013
N/A
016
N/A
1. VLAN Control Registers - Substitute [N] with Port number (0..3)
AVTCL
VLAN Type Code Register Low
VLAN Type Code Register High
Port “N” Configuration Register 0
Port “N” Configuration Register 3
VLAN Operating Mode
100
R/W
R/W
R/W
R/W
R/W
012
00
81
ff
AVTCH
101
013
PVMAP”N”_0
102 + 4N
105 + 4N
126
014+4N
017+4N
038
PVMAP”N”_3
00
00
PVMODE
2. TRUNK Control Registers
TRUNK0_MODE
TRUNK1_MODE
3. CPU Port Configuration
TX_AGE
Trunk Group 0 Mode
Trunk Group 1 Mode
207
20E
R/W
R/W
039
03A
00
00
Transmission Queue Aging Time
312
R/W
03B
08
4. Search Engine Configurations
AGETIME_LOW
AGETIME_HIGH
SE_OPMODE
MAC Address Aging Time Low
MAC Address Aging Time High
Search Engine operation mode
400
401
403
R/W
R/W
R/W
03C
03D
NA
2c
00
00
5. Buffer Control and QOS Control
FCBAT
QOSC
FCB Aging Timer
500
501
502
503
504
505
506
507
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
03E
03F
040
041
042
043
044
045
ff
QOS Control
00
08
88
c6
fa
FCR
Flooding Control Register
VLAN Priority Map Low
VLAN Priority Map Middle
VLAN Priority Map High
TOS Priority Map Low
TOS Priority Map Middle
AVPML
AVPMM
AVPMH
TOSPML
TOSPMM
88
c6
Table 7 - MVTX2801 Register Description
28
Zarlink Semiconductor Inc.
ZARLINK [ ZARLINK SEMICONDUCTOR INC ]
