MA2910
Instruction 4: Push/Conditional, Load Counter.
This instruction is used primarily for setting up loops in
microprogram firmware. In this example, when instruction 52 is
in the pipeline register, a PUSH will be made onto the stack
and the counter will be loaded based on the condition. When a
PUSH occurs, the value pushed is always the next sequential
instruction address. In this case, the address is 53. If the test
fails, the counter is not loaded; if it is passed, the counter is
loaded with the value contained in the pipeline register branch
address field.
Thus, a single microinstruction can be used to set up a
loop to be executed a specific number of times. Instruction 8
will describe how to use the pushed value and the register/
counter for looping.
Figure 5: 2 JUMP MAP (JMAP)
In the example of Figure 5, microinstructions at locations
50,51, 52 and 53 might have been the fetch sequence and at
its completion at location 53, the jump map function would be
contained in the pipeline register. This example shows the
mapping PROM outputs to be 90; therefore, an unconditional
jump to microprogram memory address 90 is performed
Instruction 3: Conditional Jump Pipeline.
This instruction derives its branch address from the
pipeline register branch address value (BR0-BR11). This
instruction provides a technique for branching to various
microprogram sequences depending upon the test condition
inputs. Quite often, state machines are designed which simply
execute tests on various inputs waiting for the condition to
come true. When the true condition is reached, the machine
then branches and executes a set of microinstructions to
perform some functions. This usually has the effect of resetting
the input under test until some point in the future.
The example shows the conditional jump via the pipeline
register address at location 52. When the contents of
mlcroprogram memory word 52 are in the pipeline register, the
next address will be either location 53 or 30, in this example. If
the test is passed, the value currently in the pipeline register
(30) will be selected. If the test fails, the next address selected
will be contained in the microprogram counter which, in this
example, is location 53.
Figure 7: 4 PUSH/COND LD CNTR (PUSH)
Instruction 5: Conditional Jump-to-Subroutine.
This instruction is a Conditional Jump-to-Subroutine via the
register/counter of the contents of the PIPELINE register. A
PUSH is always performed and one of two subroutines
executed. In this example, either the subroutine beginning at
address 80 or the subroutine beginning at address 90 will be
performed. A RETURN-FROM-SUBROUTINE (instruction
number 10) returns the microprogram flow to address 55.
In order for this microinstruction control sequence to
operate correctly, both the next address fields of instruction 53
and the next address fields of instruction 54 would have to
contain the proper value. Lets assume that the branch address
Figure 6: 3 COND JUMP PL (CLP)
Figure 8: 5 COND JSB R/PL (JSRP)
5
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