MA2910
INSTRUCTION SET
The MA2910 provides 16 instructions which select the
address of the next microinstruction to be executed. 4 of the
instructions are unconditional and their effect depends only on
the instruction. 10 of the instructions have an effect which is
partially controlled by external conditions. 3 of the instructions
have an effect which is partially controlled by the contents of
the internal register/counter. In this discussion it is assumed
the Cl is tied HIGH.
In the 10 conditional instructions, the result of the data-
dependent test is applied to CC. If the CC input is LOW, the
test is considered passed, and the action specified in the name
occurs; otherwise, the test has failed and an alternate (often
simply the execution of the next sequential microinstruction)
occurs. Testing of CC may be disabled for a specific
microinstruction by settingCCEN HIGH, which unconditionally
forces the action specified in the name; that is it forces a
pass.Other ways of using CCEN include; (1) tying it HIGH,
which is useful if no microinstruction is data-dependent; (2)
tying it LOW if data-dependent instructions are never forced
unconditionally; or (3) tying it to the source of MA2910
instruction bit I0, which leaves instructions 4,6 and 10 as data-
dependent but leaves others unconditional. All of these tricks
save one bit of microcode width
The effect of three instructions depend upon the contents
of the register/counter. Unless the counter holds a value of
zero, it is decremented; if it does hold zero, it is held and a
different microprogram next address is selected.These
instructions are useful for executing a microinstruction loop a
finite number of times. Instruction 15 is affected both by the
external condition code and the internal register/counter.
The most effective technique for understanding the
MA2910 is to simply take each instruction and review its
operation. In order to provide some feel for the actual
execution of these instructions, examples of all 16 instructions
Figure 3: 0 JUMP ZERO (JZ)
Instruction 1: Conditional Jump-to-Subroutine.
This instruction is a conditional Jump-to-Subroutine via the
address provided in the pipeline register. As shown in figure 4,
the machine might have executed words at address 50, 51,
and 52. When the contents of address 52 is in the pipeline
register the next address control function is the
CONDITIONAL JUMP-TO-SUBROUTINE. Here, if the test is
passed, the next instruction executed will be the contents of
microprogram memory location 90. If the test has failed, the
JUMP-TO-SUBROUTINE will not be executed; the contents of
microprogram memory location 53 will be executed instead.
Thus, the Conditional Jump-to-Subroutine instruction at
location 52 will cause the instruction either in location 90 or in
location 53 to be executed next. If the test input is such that the
location 90 is selected, value 53 will be pushed onto the
internal stack. This provides the return linkage for the machine
when the subroutine beginning at location 90 is completed. In
this example, the subroutine was completed at location 93 and
a RETURN-FROM-SUBROUTINE would be found at location
93.
are included.
The examples given should be interpreted in the following
manner: The intent is to show microprogram flow as various
microprogram memory words are executed.
For example, the CONTINUE instruction (number 14)
simply means that the contents of the microprogram memory
word 50 are executed, then the contents of word 51 are
executed. This is followed by the contents of 52 and 53 The
microprogram addresses used in the examples were arbitrarily
chosen and have no meaning other than to show instruction
flow. The exception to this is the first example, JUMP ZERO,
which forces the microprogram location counter to address
ZERO. Each dot refers to the time that the contents of the
microprogram memory word is in the pipeline register. While
no special symbology is used for the conditional instructions,
the following text will explain what the conditional choices are
in each example.
Figure 4: COND JSB PL (CJS)
Instruction 2: Jump-Map.
This is an unconditional instruction which causes the MAP
output to be enabled so that the next microinstruction location
is determined by the address supplied via the mapping
PROMs. Normally, the JUMP MAP instruction is used at the
end of the instruction fetch sequence for the machine.
Instruction 0: JZ (Jump to Zero, or Reset).
This instruction unconditionally specifies that the address
of the next microinstruction is zero. Many designs use this
feature for power-up sequences and provide the power-up
firmware beginning at microprogram memory word location 0.
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