MA2910
Y (0 to 11) (Microcode address)
FULL (stack full)
This is a 12 bit wide tristate output bus. It carries the
microcode address generated according to the instruction
read in from the I bus. OE can be used to put the bus in a high
impedance state. This allows another to take control of the
microcode address bus.
The active low output FULL indicates that 9 items have
been loaded onto the stack .
PL, MAP & VECT (pipeline, map and vector)
These active low outputs are set according to the
instruction being executed. At any time only one is active.
They may be used to select from one of three possible
external sources for microprogramme jumps, being used
directly as three-state enables for these sources.
OE (Output enable)
This active low input is used to enable the 12 lines of the Y
bus.
Typically: PL enables the primary source of
microprogramme jumps, usually part of a pipeline register;
MAP enables a PROM which maps an instruction to a
microcode starting location; VECT enables an optional third
source, after a vector from DMA or interrupt source.
CP (Clock Pulse)
A LOW-to-HlGH transition on this input is used to trigger all
state changes within the device.
FAIL CCEN =
REGISTER LOW & CC =
/CONTROL HIGH
PASS CCEN =
HIGH & CC =
LOW
I3 - I0 MNEMONIC
NAME
REGISTER/ ENABLE
CONTROL
Y
STACK
Y
STACK
0
1
2
3
4
JZ
JUMP ZERO
COND JS P PL
JUMP MAP
X
X
X
X
X
0
CLEAR
HOLD
HOLD
HOLD
PUSH
O
CLEAR
PUSH
HOLD
HOLD
PUSH
HOLD
HOLD
HOLD
HOLD
Note 1
PL
CJS
JMAP
CJP
PUSH
PC
D
D
PL
D
MAP
PL
COND JUMP PL
PUSH/COND LD
CNTR
PC
PC
D
PC
PL
5
JSRP
COND JSB R/PL
VECTOR
X
R
PUSH
D
PUSH
HOLD
PL
6
7
8
CJV
COND JUMP
COND JUMP R/PL
REPEAT LOOP
X
PC
R
HOLD
HOLD
HOLD
POP
D
HOLD
HOLD
HOLD
POP
HOLD
HOLD
DEC
VECT
JRP
X
D
PL
PL
PL
PL
PL
PL
PL
RFCT
¹ 0
= 0
¹ 0
= 0
X
F
F
CNTR ¹ 0
.
PC
D
PC
D
HOLD
DEC
9
RPCT
REPEAT PL,
CNTR ¹ 0
HOLD
HOLD
HOLD
HOLD
HOLD
HOLD
POP
PC
PC
PC
PC
F
HOLD
HOLD
HOLD
10
11
CRTN
CJPP
COND RTN
COND JUMP PL
& POP
X
D
POP
12
LDCT
LD CNTR &
CONTINUE
TEST END LOOP
CONTINUE
THREE-WAY
BRANCH
X
PC
HOLD
PC
HOLD
LOAD
PL
13
14
15
LOOP
CONT
TWB
X
F
HOLD
HOLD
HOLD
PO P
PC
PC
PC
PC
POP
HOLD
POP
POP
HOLD
HOLD
DEC
PL
PL
PL
P L
X
PC
F
¹ 0
= 0
D
HOLD
Note 1: If CCEN = LOW & CC = HIGH, hold, else load.
Figure 2: Table of Instructions
3
ZARLINK [ ZARLINK SEMICONDUCTOR INC ]
