R
Spartan-IIE FPGA Family: Pinout Tables
FT256 Pinouts (XC2S50E, XC2S100E,
XC2S150E, XC2S200E, XC2S300E, XC2S400E)
(Continued)
FT256 Pinouts (XC2S50E, XC2S100E,
XC2S150E, XC2S200E, XC2S300E, XC2S400E)
(Continued)
Pad Name
LVDS
Async.
Output
Option
Pad Name
LVDS
Async.
Output
Option
VREF
Option
VREF
Option
Function
I/O, L20P
Bank Pin
Function
I/O, L12P
Bank Pin
2
2
2
D14 XC2S100E, XC2S200E,
200E, 300E 300E, 400E
1
E10
XC2S50E,
100E, 200E,
300E, 400E
-
I/O (DIN, D0),
L19N_YY
B16
All
-
I/O, L12N
1
D10
XC2S50E,
100E, 200E,
300E, 400E
-
I/O (DOUT,
BUSY),
C15
All
-
L19P_YY
I/O
1
1
C10
B10
-
-
-
CCLK
TDO
TDI
2
2
-
A15
B14
C13
-
-
-
-
-
-
I/O, L11P
XC2S50E,
200E, 300E,
400E
I/O, L11N
1
1
1
1
1
A10
D9
C9
B9
XC2S50E,
200E, 300E,
400E
-
All
-
I/O (CS),
L18P_YY
1
1
1
A14
A13
B13
All
All
-
-
I/O, VREF
Bank 1, L10P
XC2S50E,
200E, 300E,
400E
I/O (WRITE),
L18N_YY
I/O, L10N
I/O, L9P
I/O, L9N
XC2S50E,
200E, 300E,
400E
I/O, L17P
XC2S50E, XC2S200E,
100E,200E, 300E, 400E
300E, 400E
XC2S50E,
150E, 200E,
400E
-
I/O, L17N
1
C12
XC2S50E,
100E,200E,
300E, 400E
-
A9
XC2S50E, XC2S400E
150E, 200E,
I/O, L16P_YY
I/O, L16N_YY
1
1
1
B12
A12
D12
All
All
All
-
-
400E
I/O, VREF
Bank 1,
L15P_YY
All
I/O (DLL), L8P
GCK2, I
1
1
A8
B8
-
-
-
-
I/O, L15N_YY
I/O, L14P
1
1
E11
D11
All
-
-
GCK3, I
I/O (DLL), L8N
I/O
0
0
0
0
C8
D8
A7
E7
-
-
-
-
XC2S50E,
100E,150E,
300E
-
XC2S400E
-
I/O, L14N
I/O, L13P
I/O, L13N
1
1
1
C11
B11
A11
XC2S50E,
100E,150E,
300E
-
I/O, L7P
XC2S50E,
200E, 300E,
400E
XC2S50E, XC2S100E,
100E,200E, 150E,200E,
300E, 400E 300E, 400E
I/O, VREF
Bank 0, L7N
0
D7
XC2S50E,
200E, 300E,
400E
All
XC2S50E,
100E,200E,
300E, 400E
-
70
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DS077-4 (2.3) June 18, 2008
Product Specification
XILINX [ XILINX, INC ]
