R
Spartan-IIE FPGA Family: Functional Description
Revision History
Version No.
Date
Description
1.0
2.0
11/15/01 Initial Xilinx release.
11/18/02 Added XC2S400E and XC2S600E. Removed Preliminary designation. Clarified details of I/O
standards, boundary scan, and configuration.
2.1
2.3
07/09/03 Added hot swap description (see Hot Swap, Hot Insertion, Hot Socketing Support). Added
Table 9 containing JTAG IDCODE values. Clarified configuration PROM support.
06/18/08 Added note that TDI, TMS, and TCK have a default pull-up resistor. Add note on maximum
daisy-chain limit. Updated Figure 19 since Mode pins can be pulled up to either 2.5V or 3.3V.
Updated all modules for continuous page, figure, and table numbering. Updated links.
Synchronized all modules to v2.3.
DS077-2 (v2.3) June 18, 2008
www.xilinx.com
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Product Specification