OPB 16450 UART
(1)
Table 10: Modem Control Register Bit Definitions
Bit
Location
Name
Access
Reset Value
Description
2
Out1
Read/Write
"0"
User Output 1.
"1" -> Drives OUT1N low.
"0" -> Drives OUT1N high.
Request To Send.
1
0
RTS
DTR
Read/Write
Read/Write
"0"
"0"
"1" -> Drives RTSN low.
"0" -> Drives RTSN high.
Data Terminal Ready.
"1" -> Drives DTRN low.
"0" -> Drives DTRN high.
Notes:
1. Bold faced bits permanently low.
Line Status Register
As shown in Table 11, the Line Status Register contains the current status of the receiver and transmitter.
Table 11: Line Status Register Bit Definitions
Bit
Location
Name
Access
Reset Value
Description
Error in RCVR FIFO.
7
Error in RCVR Read/Write
FIFO
“0”
RCVR FIFO contains at least one receiver error.
Transmitter Empty.
6
5
4
TEMT
THRE
BI
Read/Write
Read/Write
Read/Write
“0”
“1”
“1”
Transmitter Holding Register Empty.
Break Interrupt.
Set when SIN is held low for an entire character time.
Framing Error.
3
FE
Read/Write
“0”
Character missing a stop bit. Receiver resynchs with
next character, if possible.
2
1
PE
OE
Read/Write
Read/Write
“0”
“0”
Parity Error.
Overrun Error.
RBR not read before next character is received.
Data Ready.
0
DR
Read/Write
“0”
Modem Status Register
As shown in Table 12, the Modem Status Register contains the current state of the Modem interface.
10
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DS433 August 18, 2004
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Product Specification
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