OPB 16450 UART
(1)
Table 12: Modem Status Register Bit Definitions
Bit
Location
Name
Access
Reset Value
Description
Data Carrier Detect.
7
DCD
Read/Write
“X”
Complement of DCDN input.
Ring Indicator.
6
RI
Read/Write
Read/Write
Read/Write
Read/Write
Read/Write
Read/Write
Read/Write
"X"
"X"
"X"
"0"
"0"
"0"
"0"
Complement of RIN input.
Data Set Ready.
5
DSR
Complement of DSRN input.
Clear To Send.
4
CTS
Complement of CTSN input.
Delta Data Carrier Detect.
3
DDCD
TERI
DDSR
DCTS
Change in DCDN since last MSR read.
Trailing Edge Ring Indicator.
2
RIN has changed from a low to a high.
Delta Data Set Ready.
1
0
Change in DSRN since last MSR read.
Delta Clear To Send.
Change in CTSN since last MSR read.
Notes:
1. X represents bit driven by external input.
Scratch Register
As shown in Table 13, the Scratch Register can be used to hold user data.
Table 13: Scratch Register Bit Definitions
Bit
Location
Name
Access
Reset Value
Description
7-0
Scratch
Read/Write
“00000000”
Scratch.
Divisor (Least Significant Byte) Register
As shown in Table 14, the Divisor (Least Significant Byte) Register holds the least significant byte of the baud rate generator
counter.
Table 14: Divisor (Least Significant Byte) Register Bit Definitions
Bit
Location
Name
Access
Reset Value
Description
7-0
DLL
Read/Write
“00000000”
Divisor Least Significant Byte.
DS433 August 18, 2004
Product Specification
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