OPB 16450 UART
Table 3:
Parameter-Port Dependencies
(Continued)
Name
I/O
Signals
P12
P13
P14
IP2INTC_Irpt
(1)
baudoutN
rclkK
G8, P13
This input is unconnected and
UART receiver clock is connected
to BAUDOUTn if
C_HAS_EXTERNAL_RCLK=0.
Affects Depends
Relationship Description
UART Interrupt Signal
P15
P16
P17
sin
sout
xin
G7, P30
This input is unconnected and
UART reference clock is
connected to OPB_Clk if
C_HAS_EXTERNAL_XIN=0.
P18
P19
P20
P21
P22
P23
P24
P25
P26
P27
P28
P29
System
P30
P31
P32
xout
ctsN
dcdN
dsrN
dtrN
riN
rtsN
ddis
out1N
out2Nn
rxrdyN
txrdyN
OPB_Clk
OPB_Rst
Freeze
UART
Register Definition
UART
Interface (IPIF)
The OPB memory map location of the OPB 16450 UART is determined by setting the parameter C_BASEADDR, in the IPIF
interface module. The internal registers of the OPB 16450 UART are offset from the C_BASEADDR base address. Addition-
ally, some of the internal registers are accessible only when bit 7of the Line Control Register (LCR) is set. The UART internal
register set is described in
.
6
1-800-255-7778
DS433 August 18, 2004
Product Specification
XILINX [ XILINX, INC ]
