OPB 16450 UART
Divisor (Most Significant Byte) Register
As shown in Table 15, the Divisor (Most Significant Byte) Register holds the most significant byte of the baud rate generator
counter.
Table 15: Divisor (Most Significant Byte) Register Bit Definitions
Bit
Location
Name
Access
Reset Value
Description
Divisor Most Significant Byte.
7-0
DLM
Read/Write
“00000000”
UART Block Diagram
The top-level block diagram for the UART is shown in Figure 1.
RXRDYN
SIN
RCLK
OPB
Receiver
RBR/FIFO
THR/FIFO
SOUT
Transmitter
LCR
LSR
TXRDYN
IER
IIR
SRAM
IPIF
MCR
MSR
SCR
DLL
DLM
BAUDOUTN
XIN
Baud Generator
XOUT
RTSN
DTRN
MODEM
LOGIC
OUT1N
OUT2N
DDIS
CTSN DSRN DCDN RIN
Figure 1: UART Top-level Block Diagram
12
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DS433 August 18, 2004
Product Specification
XILINX [ XILINX, INC ]
