Spartan-6 FPGA Data Sheet: DC and Switching Characteristics
Endpoint Block for PCI Express Designs Switching Characteristics
The Endpoint block for PCI Express is available in the Spartan-6 LXT family. Consult the Spartan-6 FPGA Integrated
Endpoint Block for PCI Express for further information.
Table 24: Maximum Performance for PCI Express Designs
Speed Grade
Symbol
Description
User clock maximum frequency
Units
-4
-3
-2
-1L
FPCIEUSER
62.5
62.5
62.5
N/A
MHz
Performance Characteristics
This section provides the performance characteristics of some common functions and designs implemented in
Spartan-6 devices. The numbers reported here are worst-case values; they have all been fully characterized. These values
are subject to the same guidelines as the Switching Characteristics, page 17.
Table 25: Interface Performances
Speed Grade
Description
Units
-4
-3
-2
-1L
Networking Applications(1)
SDR LVDS transmitter or receiver (using IOB SDR register)
DDR LVDS transmitter or receiver (using IOB ODDR2/IDDR2 register)
SDR LVDS transmitter (using OSERDES2; DATA WIDTH = 2 to 8)
DDR LVDS transmitter (using OSERDES2; DATA WIDTH = 2 to 8)
SDR LVDS receiver (using ISERDES2; DATA WIDTH = 2 to 8)
DDR LVDS receiver (using ISERDES2; DATA WIDTH = 2 to 8)
400
800
400
800
375
750
950
950
950
950
Mb/s
Mb/s
Mb/s
Mb/s
Mb/s
Mb/s
1080
1080
1080
1080
1050
1050
1050
1050
Memory Interfaces (Implemented using the Spartan-6 FPGA Memory Controller Block)(2)
Standard Performance (standard VCCINT
)
DDR
400
667
667
400
400(4)
667(4)
667(4)
400(4)
400
625
625
400
Mb/s
Mb/s
Mb/s
Mb/s
DDR2
DDR3
—
LPDDR (Mobile_DDR)
(3)
Extended Performance (Requires Extended Memory Controller Block VCCINT
)
DDR2
DDR3
800
800
800(4)
800(4)
667
667
—
—
Mb/s
Mb/s
Notes:
1. Refer to XAPP1064, Source-Synchronous Serialization and Deserialization (up to 1050 Mb/s).
2. Refer to the Spartan-6 FPGA Memory Controller User Guide
3. Extended Memory Controller block performance for DDR2 and DDR3 can be achieved using the extended MCB performance V
from Table 2.
range
CCINT
4. The -3N speed grade does not support a Memory Controller block.
DS162 (v1.9) August 23, 2010
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Advance Product Specification
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