X1243 – Preliminary Information
PIN CONFIGURATION
quartz crystal is used. Recommended crystal is a Citizen
CFS-206. The crystal supplies a timebase for a clock/
oscillator. The internal clock can be driven by an
external signal on X1, with X2 left unconnected.
X1243
8-Pin SOIC
1
2
V
V
X1
X2
8
7
6
5
CC
Figure 1. Recommended Crystal Connection
Back
IRQ
3
4
SCL
SDA
12pF
V
SS
X1
X2
10M
X1243
8-Pin TSSOP
360K
68pF
V
SCL
Back
1
2
8
7
6
5
V
SDA
CC
X1
X2
V
SS
POWER CONTROL OPERATION
3
4
IRQ
The Power control circuit accepts a V
and a V
CC
BACK
BACK
input. The power control circuit will switch to V
when V < V
PIN DESCRIPTIONS
Serial Clock (SCL)
– 0.2V. It will switch back to V
CC
BACK
CC
when V exceeds V
.
CC
BACK
Figure 2. Power Control
The SCL input is used to clock all data into and out of
the device. The input buffer on this pin is always active
(not gated).
V
CC
Internal
Voltage
V
BACK
Serial Data (SDA)
V
= V
-0.2V
BACK
CC
SDA is a bidirectional pin used to transfer data into and
out of the device. It has an open drain output and may
be wire ORed with other open drain or open collector
outputs.The input buffer is always active (not gated).
REAL TIME CLOCK OPERATION
An open drain output requires the use of a pull-up
resistor. The output circuitry controls the fall time of the
output signal with the use of a slope controlled pull-
down. The circuit is designed for 400kHz 2-wire inter-
face speeds.
The Real Time Clock (RTC) uses an external, 32.768kHz
quartz crystal to maintain an accurate internal repre-
sentation of the year, month, day, date, hour, minute,
and seconds. The RTC has leap-year correction and a
century byte. The clock will also correct for months hav-
ing fewer than 31 days and will have a bit that controls
24-hour or AM/PM format. When the X1243 powers up
V
BACK
This input provides a backup supply voltage to the
after the loss of both V
and V
, the clock will not
device. V
supplies power to the device in the
CC
BACK
BACK
increment until at least one byte is written to the clock
register.
event the V supply fails.
CC
Interrupt Output—IRQ
Reading the Real Time Clock
This is an interrupt signal output. This signal notifies a
host processor that alarm has occurred and requests
action. It is an open drain active LOW output.
The RTC is read by initiating a Read command and
specifying the address corresponding to the register of
the Real Time Clock. The RTC Registers can then be
read in a Sequential Read Mode. Since the clock runs
continuously and a read takes a finite amount of time,
there is the possibility that the clock could change dur-
ing the course of a read operation. In this device, the
time is latched by the read command (falling edge of
X1, X2
The X1 and X2 pins are the input and output,
respectively, of an inverting amplifier that can be con-
figured for use as an on-chip oscillator. A 32.768kHz
Characteristics subject to change without notice. 2 of 18
REV 1.1.4 5/31/01
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