Production Data
WM8955BL
AUDIO SAMPLE RATES
The WM8955BL supports a wide range of master clock frequencies and can generate many
commonly used audio sample rates directly from the master clock.
There are two clocking modes:
•
•
‘Normal’ mode supports master clocks of 128fs, 192fs, 256fs, 384fs, and their multiples
USB mode supports 12MHz or 24MHz master clocks. This mode is intended for use in
systems with a USB interface, and can run without a PLL.
REGISTER
ADDRESS
BIT
LABEL
USB
DEFAULT
DESCRIPTION
Clocking Mode Select
R8 (08h)
Sample Rates
0
0
1: USB Mode
0: ‘Normal’ Mode
Sample Rate Control
MCLK Divide by 2
0: Divide disabled
1: Divide enabled
Divide BITCLK output by 2
5:1
6
SR [4:0]
00000
0
MCLK DIV2
7
BCLKDIV2
0
(use only in USB master mode, i.e.
when USB=1, MS=1)
1 = BCLK is divided by 2 (Note 1)
0 = BCLK is not divided
Table 22 Clocking and Sample Rate Control
Note:
1. With BCLKDIV2=1, the LRCLK output produces a non-50:50 duty cycle if BCLK/LRCLK is not an
even integer.
The clocking of the WM8955BL is controlled using the MCLKDIV2, USB, and SR control bits. Setting
the MCLKDIV2 bit divides MCLK by two internally. The USB bit selects between ‘Normal’ and USB
mode. Each combination of the SR4 to SR0 control bits selects one MCLK division ratio and hence
one sample rate (see Table 23). The digital filter characteristics are automatically adjusted to suit the
MCLK and sample rate selected (see Digital Filter Characteristics).
Since all sample rates are generated by dividing MCLK, their accuracy depends on the accuracy of
MCLK. If MCLK changes, the sample rates change proportionately. Note that some sample rates (e.g.
44.1kHz in USB mode) are approximated, i.e. they differ from their target value by a very small
amount. This is not audible, as the maximum deviation is only 0.27% (8.0214kHz instead of 8kHz in
USB mode – for comparison, a half-tone step corresponds to a 5.9% change in pitch).
PD Rev 4.1 February 2007
31
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WOLFSON [ WOLFSON MICROELECTRONICS PLC ]
