Production Data
WM8945
REGISTER
ADDRESS
BIT
LABEL
VB_ENA
DEFAULT
DESCRIPTION
Video buffer enable
R38 (26h)
7
0
Video Buffer
0 = Disabled
1 = Enabled
6
5
VB_QBOOST
VB_GAIN
0
0
Video buffer filter Q-Boost control
0 = Disabled
1 = Enabled
Video buffer gain
0 = 0dB (=6dB unloaded)
1 = 6dB (=12dB unloaded)
Video buffer DC offset control
000 = Reserved
VB_DISOFF
4:3
111
001 = 40mV offset
010 = Reserved
011 = 20mV offset
100 = Reserved
101 = Reserved
110 = Reserved
111 = 0mV offset
Note – the specified offset applies
to the 0dB gain setting
(VB_GAIN=0). When 6dB gain is
selected, the DC offset is doubled.
VB_PD
Video buffer pull-down
0 = pull-down disabled
1 = pull-down enabled
1
0
0
0
VB_CLAMP
Enable the clamp between the
video input and ground
0 = no clamp
1 = Video buffer input is clamped to
ground
Table 55 Video Buffer Control
The video buffer circuit is illustrated in Figure 33.
Figure 33 Video Buffer Block Diagram
The video buffer requires two external resistor components, as illustrated in Figure 33. For best
performance, the resistor RSOURCE should be matched (equal) to the load impedance RLOAD
.
PD, May 2011, Rev 4.1
81
w
WOLFSON [ WOLFSON MICROELECTRONICS PLC ]
