WM8945
Production Data
VIDEO BUFFER
The WM8945 provides a current mode output video buffer with an input 3rd order Butterworth low pass
filter (LPF) and clamp. The video buffer is powered from LDOVDD – typically 3.3V. The video buffer is
compatible with PAL and NTSC video formats.
The low pass filter (LPF) is intended to remove images in the video DAC output waveform at multiples
of the DAC clock frequency. The input clamp supports AC coupling at the input to the video buffer.
Figure 32 Video Buffer Lowpass Filter Frequency Response Gain=0dB
The current mode output employed by the WM8945 video buffer allows operation at lower supply
voltages than voltage mode video buffers. The current mode output also provides inherent protection
against short circuits during jack insertion and removal. A current reference resistor (positioned close
to the WM8945) ensures that the signal swing at the output of the buffer is the same as that at the
receiving equipment (e.g. a television set), thus providing excellent signal reproduction.
For best performance, the input to the video buffer should be AC coupled and terminated to 75.
Note that the input clamp and pull-down features described below are only applicable to the AC-
coupled input configuration.
Care should be taken with PCB layout, designing for at least 1GHz frequencies to avoid degrading
performance. PCB vias and sharp corners should be avoided and parasitic capacitance ٛ minimised
on signal paths; these should be kept as short and straight as possible. The LDOVDD supply should
be decoupled as close to the WM8945 as possible. See the “External Components” section for more
information.
The video buffer is enabled using the VB_ENA register bit. The gain of the video buffer is selected
using VB_GAIN; this can be set to 0dB or 6dB (corresponding to 6dB or 12dB unloaded). The LPF
response can be adjusted by setting the VB_QBOOST register; this provides a small amount of
additional gain in the region of the cut-off frequency.
The input signal clamp is enabled using VB_CLAMP; this controls the DC component of the video
signal for compatibility with the WM8945. The video buffer pull-down can be enabled using VB_PD;
this may be used during power-up of the video buffer in order to align the signal levels between the
source and the WM8945. Note that the pull-down should not be enabled during normal operation of
the video buffer; it should be enabled when the video buffer is first powered up, and subsequently
disabled (e.g. after 20ms) once the circuit has settled.
A programmable DC offset can be applied to the output signal using the VB_DISOFF register field;
this can be set to 0mV, 20mV or 40mV offset.
Note that the VMID reference (see “Voltage References and Master Bias”) must be enabled when
using the WM8945 video buffer. VMID is enabled by setting VMID_ENA, as defined in Table 39.
The video buffer control registers are described in Table 55.
PD, May 2011, Rev 4.1
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WOLFSON [ WOLFSON MICROELECTRONICS PLC ]
