Production Data
WM8912
WSEQ
INDEX
REGISTER
ADDRESS
WIDTH
START
DATA
DELAY
EOS
DESCRIPTION
28 (1Ch)
R94 (5Eh)
8 bits
Bit 0
00h
0h
0b
LINEOUTL_ENA_OUTP = 0
LINEOUTL_ENA_DLY = 0
LINEOUTL_ENA = 0
LINEOUTR_ENA_OUTP = 0
LINEOUTR_ENA_DLY = 0
LINEOUTR_ENA = 0
(delay = 0.5625ms)
DCS_ENA_CHAN_0 = 0
DCS_ENA_CHAN_1 = 0
DCS_ENA_CHAN_2 = 0
DCS_ENA_CHAN_3 = 0
(delay = 0.5625ms)
CP_ENA = 0
29 (1Dh)
R67 (43h)
4 bits
Bit 0
00h
0h
0b
30 (1Eh)
31 (1Fh)
R98 (62h)
R18 (12h)
1 bit
Bit 0
Bit 2
00h
00h
0h
0h
0b
0b
(delay = 0.5625ms)
DACL_ENA = 0
2 bits
DACR_ENA = 0
(delay = 0.5625ms)
CLK_DSP_ENA = 0
(delay = 0.5625ms)
HPL_PGA_ENA = 0
HPR_PGA_ENA = 0
(delay = 0.5625ms)
LINEOUTL_PGA_ENA = 0
LINEOUTR_PGA_ENA = 0
(delay = 0.5625ms)
BIAS_ENA = 0
32 (20h)
33 (21h)
R22 (16h)
R14 (0Eh)
1 bit
Bit 1
Bit 0
00h
00h
0h
0h
0b
0b
2 bits
34 (22h)
R15 (0Fh)
2 bits
Bit 0
00h
0h
0b
35 (23h)
36 (24h)
37 (25h)
38 (26h)
R4 (04h)
R5 (05h)
R5 (05h)
R5 (05h)
1 bit
1 bit
1 bit
8 bits
Bit 0
Bit 0
Bit 0
Bit 0
00h
00h
00h
00h
0h
Ch
9h
0h
0b
0b
0b
0b
(delay = 0.5625ms)
VMID_ENA = 0
(delay = 256.5ms)
VMID_ENA = 0
(delay = 32.5ms)
VMID_RES [1:0] = 00
VMID_ENA = 0
(delay = 0.5625ms)
BIAS_ENA = 0
39 (27h)
R4 (04h)
2 bits
Bit 0
00h
0h
1b
End of Sequence
Table 60 Shutdown Sequence
PD, Rev 4.0, September 2010
89
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