Production Data
WM8912
Index addresses 0 to 24 may be programmed to users’ own settings at any time, as described in
“Programming a Sequence”. Users’ own settings remain in memory and are not affected by software
resets (i.e. writing to Register R0). However, any non-default sequences are lost when the device is
powered down.
START-UP SEQUENCE
The Start-up sequence is initiated by writing 0100h to Register R111 (6Fh). This single operation
starts the Control Write Sequencer at Index Address 0 (00h) and executes the sequence defined in
Table 59.
For typical clocking configurations with MCLK=12.288MHz, this sequence takes approximately
300ms to run.
Note that, for fast startup, step 18 may be overwritten with dummy data in order to achieve startup
within 50ms (see “Quick Start-Up and Shutdown”).
WSEQ
INDEX
REGISTER
ADDRESS
WIDTH
START
DATA
DELAY
EOS
DESCRIPTION
0 (00h)
R4 (04h)
5 bits
Bit 0
1Ah
0h
0b
BIAS_ENA = 0
(delay = 0.5625ms)
VMID_RES [1:0] = 11b
VMID_ENA = 1
1 (01h)
R5 (05h)
8 bits
Bit 0
47h
6h
0b
(delay = 4.5ms)
2 (02h)
3 (03h)
4 (04h)
R5 (05h)
R4 (04h)
R14 (0Eh)
2 bits
1 bit
Bit 1
Bit 0
Bit 0
01h
01h
03h
0h
0h
0h
0b
0b
0b
VMID_RES [1:0] = 01b
(delay = 0.5625ms)
BIAS_ENA = 1
(delay = 0.5625ms)
HPL_PGA_ENA = 1
HPR_PGA_ENA = 1
(delay = 0.5625ms)
LINEOUTL_PGA_ENA = 1
LINEOUTR_PGA_ENA = 1
(delay = 0.5625ms)
CLK_DSP_ENA = 1
(delay = 0.5625ms)
DACL_ENA = 1
2 bits
5 (05h)
R15 (0Fh)
2 bits
Bit 0
03h
0h
0b
6 (06h)
7 (07h)
R22 (16h)
R18 (12h)
1 bit
Bit 1
Bit 2
01h
03h
0h
5h
0b
0b
2 bits
DACR_ENA = 1
(delay = 2.5ms)
8 (08h)
R255 (FFh)
1 bit
Bit 0
00h
0h
0b
Dummy Write for expansion
(delay = 0.5625ms)
(delay = 0.5625ms)
CP_ENA = 1
9 (09h)
R4 (04h)
1 bit
1 bit
Bit 4
Bit 0
00h
01h
0h
6h
0b
0b
10 (0Ah)
R98 (62h)
(delay = 4.5ms)
11 (0Bh)
12 (0Ch)
R255 (FFh)
R90 (5Ah)
1 bit
Bit 0
Bit 0
00h
11h
0h
0h
0b
0b
Dummy Write for expansion
(delay = 0.5625ms)
HPL_ENA = 1
8 bits
HPR_ENA = 1
(delay = 0.5625ms)
LINEOUTL_ENA = 1
LINEOUTR_ENA = 1
(delay = 0.5625ms)
HPL_ENA_DLY = 1
HPR_ENA_DLY = 1
(delay = 0.5625ms)
LINEOUTL_ENA_DLY = 1
LINEOUTR_ENA_DLY = 1
13 (0Dh)
14 (0Eh)
15 (0Fh)
R94 (5Eh)
R90 (5Ah)
R94 (5Eh)
8 bits
8 bits
8 bits
Bit 0
Bit 0
Bit 0
11h
33h
33h
0h
0h
0h
0b
0b
0b
PD, Rev 4.0, September 2010
87
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WOLFSON [ WOLFSON MICROELECTRONICS PLC ]
