Production Data
WM8912
The WSEQ_BUSY bit (in Register R112, see Table 56) will be set to 1 while the sequence runs.
When this bit returns to 0, the device has been set up and is ready for DAC playback operation.
QUICK SHUTDOWN (DEFAULT SEQUENCE)
The default shutdown sequences assumes the initial device conditions are as configured by the
default start-up sequence. Assuming 12.288MHz input clock, the shutdown sequence will take
approximately 350ms to complete.
The following register operation will initiate the default shutdown sequence.
REGISTER
VALUE
DESCRIPTION
ADDRESS
R111 (6Fh)
Write Sequencer 3
0119h
WSEQ_ABORT = 0
WSEQ_START = 1
WSEQ_START_INDEX = 19h
Table 64 Quick Shutdown Control
The WSEQ_BUSY bit (in Register R112, see Table 56) will be set to 1 while the sequence runs.
When this bit returns to 0, the system clock can be disabled (CLK_SYS_ENA=0) and MCLK can be
stopped.
SOFTWARE RESET AND CHIP ID
A Software Reset can be commanded by writing to Register R0. This is a read-only register field and
the contents will not be affected by writing to this Register.
The Chip ID can be read back from Register R0.
REGISTER
ADDRESS
BIT
LABEL
DEFAULT
DESCRIPTION
R0 (00h)
15:0
SW_RST_DE
V_ID1 [15:0]
8904h
Writing to this register resets all
registers to their default state.
SW Reset
and ID
Reading from this register will indicate
Device ID 8904h.
Table 65 Software Reset and Chip ID
PD, Rev 4.0, September 2010
93
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