WM8912
Production Data
DESCRIPTION
FLL Fractional enable
REGISTER
ADDRESS
BIT
LABEL
DEFAULT
R116 (74h)
2
FLL_FRACN_E
NA
0
FLL Control 1
0 = Integer Mode
1 = Fractional Mode
Fractional Mode
(FLL_FRACN_ENA=1) is
recommended in all cases
1
FLL_OSC_ENA
0
FLL Oscillator enable
0 = Disabled
1 = Enabled
FLL_OSC_ENA must be enabled
before enabling FLL_ENA.
Note that this field is required for free-
running FLL modes only.
0
FLL_ENA
0
FLL Enable
0 = Disabled
1 = Enabled
FLL_OSC_ENA must be enabled
before enabling FLL_ENA.
R117 (75h)
13:8
FLL_OUTDIV
[5:0]
00_0000
FLL FOUT clock divider
00_0000 = Reserved
00_0001 = Reserved
00_0010 = Reserved
00_0011 = 4
FLL Control 2
00_0100 = 5
00_0101 = 6
…
11_1110 = 63
11_1111 = 64
(FOUT = FVCO / FLL_OUTDIV)
Frequency of the FLL control block
6:4
FLL_CTRL_RAT
E [2:0]
000
000 = FVCO / 1 (Recommended
value)
001 = FVCO / 2
010 = FVCO / 3
011 = FVCO / 4
100 = FVCO / 5
101 = FVCO / 6
110 = FVCO / 7
111 = FVCO / 8
Recommended that these are not
changed from default.
PD, Rev 4.0, September 2010
72
w
WOLFSON [ WOLFSON MICROELECTRONICS PLC ]
