WM8802
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RERR output setting:
REGISTER ADDRESS
CCB address: 0xE8,
Command address: 9
DI7
DI6
DI5
DI4
DI3
DI2
DI1
DI0
1
0
0
1
0
0
CAU
CAL
DI15
DI14
DI13
DI12
DI11
DI10
DI9
DI8
ERWT1
ERWT0
FSERR
RESTA
XTWT1
XTWT0
REDER
RESEL
RESEL
RERR output contents setting
0: PLL lock error or data error (initial value)
1: PLL lock error or data error or non-PCM data
REDER
8 continuous times parity error flag output setting
0: Output during non-PCM data recognition. (initial value)
1: Output only during sub-frame for which error was generated.
XTWT [1:0]
Clock switch wait time setting after PLL unlock
00: Clock switching after approx. 200µs following oscillation amplifier
start
(initial value)
01: Clock switching after approx. 100µs following oscillation amplifier
start
10: Clock switching after approx. 50µs following oscillation amplifier
start
11: Clock switching after approx. 400µs following oscillation amplifier
start
RESTA
RERR output condition setting
0: Output permanent PLL status (Output PLL status even during XIN
source) (initial status)
1: Forcibly output error (Set High forcibly to RERR)
FSERR
Setting of error flag output condition through fs change
0: Reflect fs changes to error flag. (initial value)
1: Do not reflect fs changes to error flag.
ERWT [1:0]
RERR wait time setting after PLL lock
00: Error release preamble B after 48 counts. (initial value)
01: Error release preamble B after 24 counts.
10: Error release preamble B after 12 counts.
11: Error release preamble B after 6 counts.
Non-PCM data is reflected as data defined by AOSEL and matches the AUDIO pin output.
Output data is muted if an error occurs due to non-PCM data RESEL.
The RESTA setting is not reflected to the data and clock output pins.
When FSERR is set the fs calculation result (when the oscillation amplifier is stopped) is not
reflected. In this case, fs changes reflect only of channel status fs information.
ERWT[0:1] defines the interval after which an RERR error is cancelled (Low) following a PLL lock. Do
not perform this setting if cutting off of the beginning of data is a problem.
PP Rev 1.1 April 2004
50
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WOLFSON [ WOLFSON MICROELECTRONICS PLC ]
