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WM8802SCFV 参数 Datasheet PDF下载

WM8802SCFV图片预览
型号: WM8802SCFV
PDF下载: 下载PDF文件 查看货源
内容描述: 数字音频接口收发器 [Digital Audio Interface Transceiver]
分类和应用:
文件页数/大小: 65 页 / 516 K
品牌: WOLFSON [ WOLFSON MICROELECTRONICS PLC ]
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WM8802  
Product Preview  
Clock source; RDA TA output setting:  
REGISTER ADDRESS  
CCB address: 0xE8;  
Command address: 5  
DI7  
DI6  
DI5  
DI4  
DI3  
DI2  
DI1  
DI0  
0
1
0
1
0
0
CAU  
CAL  
DI15  
DI14  
DI13  
DI12  
DI11  
DI10  
DI9  
DI8  
0
RDTMUT  
RDTSTA  
RDTSEL  
0
RCKSEL  
OCKSEL  
SELMTD  
SELMTD  
Output clock source switching setting  
0: Simultaneously switch R system and S system according to  
OCKSEL. (initial value)  
1: Switch R system according to RCKSEL and fix S system to XIN.  
OCKSEL  
RCKSEL  
RDTSEL  
RDTSTA  
RDTMUT  
Clock source setting when SELMTD = 0  
0: Use XIN clock as source during PLL lock. (initial value)  
1: Use XIN clock as source regardless of PLL status.  
Clock source setting when SELMTD = 1  
0: Use XIN clock as source during PLL lock. (initial value)  
1: Use XIN clock as source regardless of PLL status.  
RDATA output setting during PLL unlock  
0: Output SDIN data during PLL unlock. (initial value)  
1. Mute during PLL unlock.  
RDATA output setting  
0: According to RDTSEL (initial value)  
1: Output SDIN input data regardless of PLL status.  
RDATA mute setting  
0: Output data selected with RDTSEL.  
1: Muted  
When the oscillation amplifier is set to permanent continuous operation using AMPOPR[0:1] or if  
changes are set not to be reflected to the error flag using FSERR, OCKSEL and RCKSEL can switch  
the clock source while maintaining the RERR status. However, RERR outputs an error during  
switching if none of these settings are performed.  
A clock synchronized to the SDIN input data is selected to input data to SDIN.  
The XIN source can be switched while maintaining the PLL locked status. However, since clock and  
data output switching can be set individually for each, it is recommended to select mute or SDIN data  
for the output data during XIN source switching.  
If AMPOPR[0:1] is set to automatically stop the oscillation amplifier during PLL locked, XIN source  
switching from the PLL locked status is executed only after the resonator is oscillating stably. Output  
data switching is also done at this time according to XIN source switching.  
PP Rev 1.1 April 2004  
46  
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