Product Preview
WM8777
REGISTER
ADDRESS
BIT
LABEL
DEFAULT
DESCRIPTION
1000111
(47h)
3:0
GPIO1OP[3:0]
0000
0000 = INT
0001 = V - Validity
0010 = U - User Data bit
GPIO
Control 1
0011 = C - Channel Status Data
0100 = P - Parity bit
0101 = Non-audio (AUDIO_N || PCM_N)
0110 = UNLOCK
0111 = CSUD (Channel Status Registers Updated)
1000 = Zero Flag 1 output
1001 = Zero Flag 2 output
1010 = GPIO1set as S/PDIF input (standard CMOS input buffer)
1011 = GPIO1set as S/PDIF input (‘comparator’ input for AC
coupled consumer S/PDIF signals)
1100 = Sub Frame clock (1 = sub-frame1, 0 = sub-frame2)
1101 = Start of Block signal
7:4
GPIO2OP[3:0]
0001
0000 = INT
0001 = V - Validity
0010 = U - User Data bit
0011 = C - Channel Status Data
0100 = P - Parity bit
0101 = Non-audio (AUDIO_N || PCM_N)
0110 = UNLOCK
0111 = CSUD (Channel Status Registers Updated)
1000 = Zero Flag 1 output
1001 = Zero Flag 2 output
1010 = GPIO2set as S/PDIF input (standard CMOS input buffer)
1011 = GPIO2set as S/PDIF input (‘comparator’ input for AC
coupled consumer S/PDIF signals)
1100 = Sub Frame clock (1 = sub-frame1, 0 = sub-frame2)
1101 = Start of Block signal
1001000
(48h)
3:0
GPIO3OP[3:0]
0010
0000 = INT
0001 = V - Validity
GPIO
0010 = U - User Data bit
Control 2
0011 = C - Channel Status Data
0100 = P - Parity bit
0101 = Non-audio (AUDIO_N || PCM_N)
0110 = UNLOCK
0111 = CSUD (Channel Status Registers Updated)
1000 = Zero Flag 1 output
1001 = Zero Flag 2 output
1010 = GPIO3set as S/PDIF input (standard CMOS input buffer)
1011 = GPIO3set as S/PDIF input (‘comparator’ input for AC
coupled consumer S/PDIF signals)
1100 = Sub Frame clock (1 = sub-frame1, 0 = sub-frame2)
1101 = Start of Block signal
PP Rev 1.94 November 2004
91
w
WOLFSON [ WOLFSON MICROELECTRONICS PLC ]
