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WM8777SEFT 参数 Datasheet PDF下载

WM8777SEFT图片预览
型号: WM8777SEFT
PDF下载: 下载PDF文件 查看货源
内容描述: 24位192KHZ AV接收机芯片 [24 BIT 192KHZ AV RECEIVER ON A CHIP]
分类和应用: 接收机
文件页数/大小: 102 页 / 1257 K
品牌: WOLFSON [ WOLFSON MICROELECTRONICS PLC ]
 浏览型号WM8777SEFT的Datasheet PDF文件第89页浏览型号WM8777SEFT的Datasheet PDF文件第90页浏览型号WM8777SEFT的Datasheet PDF文件第91页浏览型号WM8777SEFT的Datasheet PDF文件第92页浏览型号WM8777SEFT的Datasheet PDF文件第94页浏览型号WM8777SEFT的Datasheet PDF文件第95页浏览型号WM8777SEFT的Datasheet PDF文件第96页浏览型号WM8777SEFT的Datasheet PDF文件第97页  
Product Preview  
WM8777  
REGISTER  
ADDRESS  
BIT  
LABEL  
DEFAULT  
DESCRIPTION  
7
SPDIF_MODE  
S/PDIF mode change.  
0: Normal running  
1: Change in S/PDIF frequency mode detected.  
Recovered S/PDIF Channel status bit 0.  
0 = Consumer Mode  
1001100  
(4Ch)  
0
CON/PRO  
S/PDIF  
Receiver  
Channel  
Status  
Register 1  
(read-only)  
1 = Professional Mode  
The WM8777 is a consumer mode device. Detection of  
professional mode may give erroneous behavior.  
1
2
3
AUDIO_N  
CPY_N  
Recovered S/PDIF Channel status bit 1.  
0 = Data word represents audio PCM samples.  
1 = Data word does not represent audio PCM samples.  
Recovered S/PDIF Channel status bit 2.  
0 = Copyright is asserted for this data.  
1 = Copyright is not asserted for this data.  
Recovered S/PDIF Channel status bit 3.  
0 = Recovered S/PDIF data has no pre-emphasis.  
1 = Recovered S/PDIF data has pre-emphasis.  
Recovered S/PDIF Channel status bits[5:4].  
Reserved for additional de-emphasis modes.  
Recovered S/PDIF Channel status bits[7:6].  
00 = Only valid mode for consumer applications.  
All other modes reserved.  
DEEMPH  
5:4  
7:6  
Reserved  
CHSTMODE[1:0]  
1001101  
(4Dh)  
7:0  
CATCODE[7:0]  
Recovered S/PDIF Channel status bits[15:8] - Category Code.  
Refer to S/PDIF specification for details.  
00h indicates “general” mode.  
S/PDIF  
Receiver  
Channel  
Status  
Register 2  
(read-only)  
1001110  
(4Eh)  
3:0  
7:4  
SRCNUM[3:0]  
CHNUM1[3:0]  
Recovered S/PDIF Channel status bits[19:16] - Indicates number  
of S/PDIF source.  
Recovered S/PDIF Channel status bits[23:20] - Channel number  
for channel 1.  
S/PDIF  
Receiver  
Channel  
Status  
0000 = Take no account of channel number (channel 1 defaults to  
left DAC)  
Register 3  
(read-only)  
0001 = channel 1 to left channel  
0010 = channel 1 to right channel  
1001111  
(4Fh)  
3:0  
5:4  
FREQ[3:0]  
Recovered S/PDIF Channel status bits[27:24] - Sampling  
Frequency. See S/PDIF specification for details.  
0001 = Sampling Frequency not indicated.  
S/PDIF  
Receiver  
Channel  
Status  
Register 4  
(read-only)  
CLKACU[1:0]  
Recovered S/PDIF Channel status bits[29:28] - Clock Accuracy of  
received clock.  
00 = Level II  
01 = Level I  
10 = Level III  
11 = Interface frame rate not matched to sampling frequency.  
1010000  
(50h)  
0
MAXPAIFRX_WL  
Recovered S/PDIF Channel status bit[32] - Maximum Audio  
sample word length  
0 = 20 bits  
1 = 24 bits  
S/PDIF  
Receiver  
Channel  
Status  
Register 5  
(read-only)  
3:1  
RXPAIFRX_WL  
[2:0]  
Recovered S/PDIF Channel status bits[35:33] - Audio Sample  
Word Length  
RXPAIFRX_WL  
MAXPAIFRX_WL=  
=1  
MAXPAIFRX_WL=  
=0  
001  
010  
100  
20 bits  
22 bits  
23 bits  
16 bits  
18 bits  
19 bits  
PP Rev 1.94 November 2004  
93  
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