WM8777
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REGISTER
ADDRESS
BIT
LABEL
DEFAULT
DESCRIPTION
101
110
24 bits
21 bits
20 bits
17 bits
All other combinations are reserved and may give erroneous
operation.
7:4
0
ORGSAMP[3:0]
AUDIO_N
Recovered S/PDIF Channel status bits[39:36] - Original Sampling
Frequency. See S/PDIF specification for details.
0000 = original sampling frequency not indicated
Received Channel status bit 1
1010001
(51h)
0 = Data word represents audio PCM samples.
1 = Data word does not represent audio PCM samples.
S/PDIF
Status (read-
only)
1
2
PCM_N
CPY_N
Detects non-audio data from a 96-bit sync code, as defined in
IEC-61937.
0 = Sync code not detected.
1 = Sync code detected – received data is not audio PCM.
Recovered S/PDIF Channel status bit 2.
0 = Copyright is asserted for this data.
1 = Copyright is not asserted for this data.
Note this signal is inverted and will cause an interrupt on logic 0.
S/PDIF frequency mode.
4:3
SPDIF_MODE
00: Not supported
01: 88-96KHz
10: 44-48KHz
11: 32KHz
1111111
(7Fh)
Writing any value to this register will apply a reset to the device
registers.
8:0
RESET
Software
reset
Table 82 Register Map Description
PP Rev 1.94 November 2004
94
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WOLFSON [ WOLFSON MICROELECTRONICS PLC ]
