WM8776
Production Data
ANALOGUE OUTPUT VOLUME CONTROLS
There are analogue volume controls for the headphone outputs which may be adjusted
independently using separate volume control registers.
REGISTER
ADDRESS
BIT
LABEL
DEFAULT
DESCRIPTION
R0 (00h)
0000000
6:0
HPLA[6:0]
1111001
(0dB)
0
Attenuation data for Headphone Left channel in 1dB steps. See
Table 13
Analogue
Attenuation
Headphone
Output Left
7
8
HPLZCEN
UPDATE
Headphone left zero cross detect enable
0: zero cross disabled
1: zero cross enabled
Not latched
Controls simultaneous update of Headphone Attenuation Latches
0: Store HPLA in intermediate latch (no change to output)
1: Store HPLA and update attenuation on both channels.
R1 (01h)
0000001
6:0
7
HPLA[6:0]
HPRZCEN
1111001
(0dB)
0
Attenuation data for Headphone Right channel in 1dB steps. See
Table 13
Analogue
Attenuation
Headphone right zero cross detect enable
0: zero cross disabled
Headphone
Output Right
1: zero cross enabled
8
UPDATE
Not latched
Controls simultaneous update of Headphone Attenuation Latches
0: Store HPRA in intermediate latch (no change to output)
1: Store HPRA and update attenuation on both channels.
R2 (02h)
0000010
6:0
7
HPMASTA
[6:0]
1111001
(0dB)
0
Attenuation data for both Headphone channels in 1dB steps. See
Table 13
Headphone
Master
Analogue
MZCEN
UPDATEA
HPPD
Master zero cross detect enable
0: zero cross disabled
1: zero cross enabled
Attenuation
8
Not latched
1
Controls simultaneous update of Attenuation Latches
0: Store gain in intermediate latch (no change to output)
1: Store gain and update attenuation on all channels.
Headphone output/PGA Power Down
0 : HP out enabled
(both channels)
R13 (0Dh)
0001101
3
Power Down
1 : HP out disabled
Table 12 Headphone Attenuation Register Map
Each analogue headphone output channel has a PGA which can be used to attenuate the output
from that channel. The PGA’s can be powered up or down using the HPPD bit. Attenuation is 0dB by
default but can be set between +6dB and –73dB in 1dB steps using the two Attenuation control
words. The attenuation registers are double latched allowing them to be updated in pairs. Setting the
UPDATE bit on an attenuation write to one channel, for example HPOUTL, will cause the pre-latched
value in HPOUTR to be applied to the PGA. A master attenuation register is also included, allowing
both volume levels to be set to the same value in a single write.
Note: The UPDATE bit is not latched. If UPDATE=0, the Attenuation value will be written to the pre-
latch but not applied to the PGA. If UPDATE=1, pre-latched values will be applied from the next input
sample. Writing to HPMASTA[6:0] overwrites any values previously sent to HPLA[6:0] and
HPRA[6:0].
HEADPHONE OUTPUT PGA ATTENUATION
The analogue output PGAs are controlled by the HPLA and HPRA registers. Register bits MASTA
can be used to control attenuation of both channels.
Table 13 shows how the attenuation levels are selected from the 7-bit words.
PD Rev 4.0 April 2005
30
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WOLFSON [ WOLFSON MICROELECTRONICS PLC ]
