Advanced Information
WM8753L
It is recommended to connect the DC coupled headphone outputs only to headphones, and not to the
line input of another device. Although the built-in short circuit protection will prevent any damage to
the headphone outputs, such a connection may be noisy, and may not function properly if the other
device is grounded.
SPEAKER OUTPUT
LOUT2 and ROUT2 can differentially drive a mono 8Ω speaker as shown below.
LEFT
MIXER
LOUT2
LOUT2VOL
WM8753L
ROUT2INV = 1
VSPKR = L-(-R) = L+R
-1
ROUT2
RIGHT
MIXER
ROUT2VOL
Figure 12 Speaker Output Connection
The right channel is inverted by setting the ROUT2INV bit, so that the signal across the loudspeaker
is the sum of left and right channels.
Alternatively it is possible to drive 2 BTL stereo speakers, one between LOUT2 and OUT4, the other
between ROUT2 and OUT3, but only to about 250mW/2 due to the limited drive capability of the
OUT3/OUT4 outputs.
LINE OUTPUT
The analogue outputs, LOUT1/ROUT1 and LOUT2/ROUT2, can be used as line outputs. Additionally,
OUT3 and MONO2 can be used as a stereo line-out by setting OUT3SW=11 (reg. 24) and ensuring
the contents of registers 38 and 39 (mono-out mix) are the same as reg. 34 and 35 (left out mix).
Recommended external components are shown below.
C1
R1
1uF
100 Ohm
LINE-OUT SOCKET
(LEFT)
LOUT1/2
ROUT1/2
AGND
AGND
WM8753L
LINE-OUT SOCKET
(RIGHT)
C2
1uF
R2
100 Ohm
Figure 13 Recommended Circuit for Line Output
The DC blocking capacitors and the load resistance together determine the lower cut-off frequency, fc.
Assuming a 10 kΩ load and C1, C2 = 1µF:
fc = 1 / 2π (RL+R1) C1 = 1 / (2π x 10.1kΩ x 1µF) = 16 Hz
Increasing the capacitance lowers fc, improving the bass response. Smaller values of C1 and C2 will
diminish the bass response. The function of R1 and R2 is to protect the line outputs from damage
when used improperly.
INTERRUPT CONTROLLER
The WM8753L can generate an interrupt based on seven separate level-sensitive sources. Each
source has programmable polarity and can be individually enabled. On detecting an enabled request
with the correct polarity, a status latch for that source is set. If any of the status latches are set, the
interrupt controller generates an internal INT signal that can be routed to one of the general purpose
pins. The value of the status latches can be obtained over the control interface using the read/write
mode. Each latch is cleared by disabling the source in question. Once cleared, the source can be re-
enabled if desired. Figure 14 illustrates the operation of the interrupt controller circuit.
AI Rev 3.1 June 2004
48
w