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WM8753LEB/V 参数 Datasheet PDF下载

WM8753LEB/V图片预览
型号: WM8753LEB/V
PDF下载: 下载PDF文件 查看货源
内容描述: HI FI和电话双CODEC [HI FI AND TELEPHONY DUAL CODEC]
分类和应用: 电话
文件页数/大小: 87 页 / 1033 K
品牌: WOLFSON [ WOLFSON MICROELECTRONICS PLC ]
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WM8753L  
Advanced Information  
OUT4 OUTPUT  
The OUT4 output can be used to output a buffered Vmid for driving a mono or stereo headset in  
capless mode, output the signal from the record mixer or drive out an inverted LOUT2 signal. The  
output mode is determined by OUT4SW[1:0]. This output is enabled by setting register bit OUT4 high.  
REGISTER  
ADDRESS  
BIT  
8:7  
LABEL  
DEFAULT  
00  
DESCRIPTION  
OUT4 Output select  
00 = VREF  
01 = Record Mixer  
10 = LOUT2 signal  
R63 (3Fh)  
Additional  
Control  
OUT4SW  
[1:0]  
(volume controlled by LOUT2VOL)  
11 = unused  
Table 40 OUT4SW control of OUT4  
ZERO CROSS TIMEOUT  
A zero-cross timeout function is also provided so that if zero cross is enabled on the input or output  
pgas the gain will automatically update after a timeout period if a zero cross has not occurred. This is  
enabled by setting TOEN. The timeout period is dependent on the clock input to the digital and is  
equal to 221 * input clock period. The timeout clock may be set to be derived from either the mclk or  
pcmclk using SLWCLK..  
REGISTER  
ADDRESS  
BIT  
LABEL  
TOEN  
DEFAULT  
DESCRIPTION  
R18 (12h)  
Additional  
Control  
0
0
0
0
Timeout clock enable  
0 = timeout clock disabled  
1 = timeout clock enabled  
R52 (34h)  
SLWCLK  
Timeout and Headphone switch clock  
source  
Clock Control  
0 = mclk  
1 = pcm clk  
Table 41 Timeout Clock Controls  
ENABLING THE OUTPUTS  
Each analogue output of the WM8753L can be separately enabled or disabled. The analogue mixer  
associated with each output is powered on or off along with the output pin. All outputs are disabled by  
default. To save power, unused outputs should remain disabled.  
Outputs can be enabled at any time, except when VREF is disabled (VR=0), as this may cause pop  
noise (see “Power Management” and “Applications Information” sections)  
REGISTER  
ADDRESS  
BIT  
LABEL  
DEFAULT  
DESCRIPTION  
R22 (16h)  
Power  
Management  
(3)  
8
7
6
5
4
3
2
1
LOUT1  
0
0
0
0
0
0
0
0
LOUT1 Enable  
ROUT1  
LOUT2  
ROUT2  
OUT3  
ROUT1 Enable  
LOUT2 Enable  
ROUT2 Enable  
OUT3 Enable  
OUT4 Enable  
MONO1 Enable  
MONO2 Enable  
OUT4  
MONO1  
MONO2  
Note: All “Enable” bits are 1 = ON, 0 = OFF  
Table 42 Analogue Output Control  
AI Rev 3.1 June 2004  
45  
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