Advanced Information
WM8753L
REGISTER BIT
ADDRESS
LABEL
TSDIPOL
DEFAULT
DESCRIPTION
R25 (19h)
Interrupt
Polarity
7
6
5
4
3
1
0
Controls polarity of thermal shutdown interrupts.
0 = Interrupt when thermal shutdown active.
1 = Interrupt when thermal shutdown inactive.
HPSWIPOL
GPIO5IPOL
GPIO4IPOL
GPIO3IPOL
MICDETPOL
0
0
0
0
0
Controls polarity of Headphone interrupts.
0 = Interrupt when headphone connected.
1 = Interrupt when headphone disconnected.
Controls polarity of GPIO5 interrupts.
0 = Interrupt when GPIO5 high.
1 = Interrupt when GPIO5 low.
Controls polarity of GPIO4 interrupts.
0 = Interrupt when GPIO4 high
1 = Interrupt when GPIO4 low
Controls polarity of GPIO3 interrupts.
0 = Interrupt when GPIO3 high
1 = Interrupt when GPIO3 low
Controls polarity of microphone bias detect
interrupt
0 = Interrupt when above threshold
1 = Interrupt when below threshold
0
MICSHTPOL
0
Controls polarity of microphone bias short circuit
interrupts.
0 = Interrupt when bias over current
1 = Interrupt when bias normal
R26 (1Ah)
Interrupt
Mask
7
6
5
4
3
1
0
TSDIEN
0
0
0
0
0
0
0
Controls thermal shutdown interrupt.
1 = Enable interrupt.
0 = Disable interrupt.
HPSWIEN
GPIO5IEN
GPIO4IEN
GPIO3IEN
MICDETEN
MICSHTEN
Controls headphone interrupt.
1 = Enable interrupt.
0 = Disable interrupt.
Controls GPIO5 interrupt.
1 = Enable interrupt.
0 = Disable interrupt.
Controls GPIO4 interrupt.
1 = Enable interrupt.
0 = Disable interrupt.
Controls GPIO3 interrupt.
1 = Enable interrupt.
0 = Disable interrupt.
Controls Microphone Bias detect interrupt
1 = Enable interrupt.
0 = Disable interrupt.
Controls microphone bias short circuit interrupt
(button press).
1 = Enable interrupt.
0 = Disable interrupt.
R27 (1Bh) 8:7
Interrupt
Control
INTCON
00
Controls INT signal from controller.
00 = Disabled (no interrupts).
01 = Open drain active low INT signal.
10 = Active high INT signal.
(1)
11 = Active low INT signal.
Note that physical pin used for INT is controlled
via GPIO Control register.
Table 48 Interrupt Control
AI Rev 3.1 June 2004
50
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