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WM8753LEB/V 参数 Datasheet PDF下载

WM8753LEB/V图片预览
型号: WM8753LEB/V
PDF下载: 下载PDF文件 查看货源
内容描述: HI FI和电话双CODEC [HI FI AND TELEPHONY DUAL CODEC]
分类和应用: 电话
文件页数/大小: 87 页 / 1033 K
品牌: WOLFSON [ WOLFSON MICROELECTRONICS PLC ]
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Advanced Information  
WM8753L  
REGISTER  
ADDRESS  
BIT  
4:3  
LABEL  
DEFAULT  
00  
DESCRIPTION  
R27 (1Bh)  
GPIO  
GPIO5M[1:0]  
Configures GPIO5 pin. (2-wire interface  
mode only)  
00 = Input only.  
Control (1)  
01 = INT from interrupt controller.  
10 = Drive low.  
11 = Drive high.  
2:0  
GPIO4M[2:0]  
000  
Configures GPIO4 pin.  
000 = Input only.  
001 = unused.  
010 = input only with pull-down.  
011 = Input only with pull-up.  
100 = Drive low.  
101 = Drive high.  
110 = SDOUT from control interface  
111 = INT from interrupt controller  
R28 (1Ch)  
GPIO  
Control (2)  
8:6  
5:3  
GPIO3M[2:0]  
000  
000  
Configures GPIO3 pin  
000 = Input only.  
001 to 011 Reserved.  
100 = Drive low.  
101 = Drive high.  
110 = SDOUT from control interface.  
111 = INT from interrupt controller.  
GP2M[2:0]  
Configures GP2/CLK2 pin when  
CLK2EN=0  
000 = Drive low.  
001 = Drive high.  
010 = SDOUT from control interface.  
011 = INT from interrupt controller.  
100 = ADC clock (=256 x fs)  
101 = Hi-Fi DAC clock (=256 x fs)  
110 = ADC clock divided by 2  
111 = DAC clock divided by 2  
2:0  
GP1M[2:0]  
000  
Configures GP1/CLK1 pin when  
CLK1EN=0  
000 = Drive low.  
001 = Drive high.  
010 = SDOUT from control interface.  
011 = INT from interrupt controller.  
100 to 111 = reserved  
Table 49 GPIO Control  
Note:  
GPIO5 must not be used in 3-wire interface mode. GPIO5 pin is shared with 3-wire interface CSB.  
Enabling GPIO5 as an output will prevent 3-wire writes to the WM8753L.  
AI Rev 3.1 June 2004  
52  
w
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