W9825G6KH
6. BLOCK DIAGRAM
CLK
CLOCK
BUFFER
CKE
CS
CONTROL
SIGNAL
GENERATOR
RAS
CAS
COMMAND
DECODER
COLUMN DECODER
COLUMN DECODER
WE
CELL ARRAY
BANK #1
CELL ARRAY
BANK #0
A10
MODE
REGISTER
SENSE AMPLIFIER
A0
SENSE AMPLIFIER
ADDRESS
BUFFER
A9
A11
A12
BS0
BS1
DQ0
DATA CONTROL
CIRCUIT
DQ
BUFFER
DQ15
REFRESH
COUNTER
COLUMN
COUNTER
LDQM
UDQM
COLUMN DECODER
COLUMN DECODER
CELL ARRAY
BANK #2
CELL ARRAY
BANK #3
SENSE AMPLIFIER
SENSE AMPLIFIER
Note: The cell array configuration is 8192 * 512 * 16.
Publication Release Date: Sep. 01, 2014
Revision: A02
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